DIGITAL-LOGIC MICROSPACE MSM800SEV, Technical User'S Manual

Page: 76 / 92

DIGITAL-LOGIC AG
MSM800 SEV Manual V1.0A
76
13.2 POST CODES
BIOS POST CODES
Checkpoint Function Name Intermediate
Codes
Function Description
FOh Reset Vector FOh XpressROM code execution start
80h UserPrelnit --- User added code to be run first
00h PreSiolnit 60h First SIO access, Core SIO initialize, LPT can be
mapped to 1/0 80h for
embedded devices to provide POST code output.
01h Clocklnit --- Chipset level clock initialize
02h GxmReglnit --- 1/0 based Geode initialize
03h UnReal --- Create a 32-bit real mode descriptor
04h gxmMemReg1nit --- Memory mapped 1/0 based Geode initialize
05h gxmTest --- Geode CPU tests
20h Test entry
28h- 2Fh Test stepping ID (2Fh = Test Failed)
2Ah Test feature
2Eh Test passed exit
06h MemSetup --- Auto size memory controller DIMM I and DIMMO
70h Set the clock drive strength and shift value, mask the
clocks
72h Set the data, address, and control drive, clear refer-
ence timer and VGA
wrap
73h Set the register to indicate no DIMMs installed
74h Default CAS latency to 3
75h or 7Fh Memory sizing (7Fh = No memory located)
76h Do refresh
7E MemSetup exit
memTest-
PinCheck
--- See if MTEST pins to be enabled
07h memSetUpStack --- Setup a stack
90h or 9Fh Create stack (9Fh = Stack creation failure)
9Eh Stack setup exit
08h memTest --- Test memory address lines
BOh Test memory
BEh Memory test exit
BFh Memory test failed (i.e., BOh)
09h shadowRom --- Copy ROM from FOOO:0000 to RAM at FOOO:0000