Digital Equipment HiNote VP 700 Series, Service Quick Reference Manual

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Troubleshooting
4-17
Code POST Routine Description
18h 8254 timers initialization.
1Ah Initialize DMA command register.
1Ch Initialize the 8259 interrupt controller.
20h Verify that DRAM refresh is operating by polling the
refresh bit in PORTB.
22h Test 8742 Keyboard Controller.
24h Set segment-register addressibility to 4 GB
28h Autosize DRAM.
29h Initialize the POST Memory Manager
2Ah Zero the first 512K of RAM
2Ch Test 512K base address lines
2Eh Test first 512K of RAM.
2Fh Initialize external cache before shadowing.
32h Compute CPU speed.
34h Test CMOS
35h Load alternate registers with initial table values.
37h Re-initialize chipset registers.
38h` Shadow the system BIOS.
39h Reinitialize the external cache.
3Ah Autosize external cache.
3Ch Load chipset registers with values from CMOS.
3Dh Load alternate registers with CMOS values.
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