Digital Equipment HiNote VP 700 Series, Service Quick Reference Manual, Page: 101 / 149

Troubleshooting
4-16
Phoenix BIOS Test Points
The following is a list of the checkpoint codes written at the start
of each test and the beep codes issued for terminal errors:
Code POST Routine Description
02h Verify Real Mode.
03h Disable Non-Maskable Interrupts.
04h Get CPU type. Save CPU type in NVRAM.
06h Initialize system hardware.
08h Initialize chip set registers to the Initial POST Values.
09h Set in-POST flag in CMOS.
0Ah Initialize CPU registers
0Bh Enable CPU cache.
0Ch Set the initial POST values of the cache registers.
0Fh Enable the local bus IDE.
10h Initialize Power Management.
11h Set initial POST values for other hardware devices
defined in the register tables.
12h Restore the contents of the CPU control word whenever
the CPU is reset.
13h Early reset of PCI devices required to disable bus
master.
14h Test 8742 keyboard controller.
16h Verify that the ROM BIOS checksums to zero
17h Initialize external cache before autosizing memory.
continued