Digilent Nexys 3 Reference Manual Download Page 21

Nexys 3™ FPGA Board Reference Manual 

 

 

Copyright Digilent, Inc. All rights reserved. 

Other product and company names mentioned may be trademarks of their respective owners.

 

Page 

21

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Spartan 6

8

PmodA

8

8

8

PmodB

PmodC

PmodD

Bank2

Bank3

Bank3

Bank0*

 

signals are not matched pairs, and they are routed using best-available tracks without impedance control or delay 
matching. 

 

 

 

 

 

 

 

 

 

 

 

 

Digilent produces a large collection of Pmod accessory boards that can attach to the Pmod and VHDC expansion 
connectors to add ready-made functions like A/D's, D/A's, motor drivers, sensors, cameras and other functions. 
See 

www.digilentinc.com

 for more information. 

 

11  Built-In Self Test 

A demonstration configuration is loaded into the BPI PCM device on the Nexys 3 board during manufacturing. This 
demo bit file is available for download from the Digilent website. If the demo configuration is present in the BPI 
PCM device and the Nexys 3 board is powered on in BPI mode, a simple demo project will allow basic hardware 
verification. The demo drives a counter on the 7-segment display, drives the user LEDs on and off when the user 
switches are toggled, turns off digits on the 7-segment display when user buttons are pressed, and drives an image 
out the VGA port.  A USB mouse can be connected to J4 for a simple visual demonstration.  

If the demo configuration is not present in the BPI device, it can be downloaded from the Digilent website and 
programmed directly into the FPGA or reloaded into the PCM device using the Adept programming software. The 
same basic functionality is also available using the automated Test tab in the Adept application. Using the Test tab 
automatically loads a demo configuration into the FPGA, so no separate bit files or project need to be used. 

All Nexys 3 boards are 100% tested during the manufacturing process. If any device on the Nexys 3 board fails test 
or is not responding properly, it is likely that damage occurred during transport or during use. Typical damage 
includes stressed solder joints and contaminants in switches and buttons resulting in intermittent failures. Stressed 
solder joints can be repaired by reheating and reflowing solder and contaminants can be cleaned with off-the-shelf 
electronics cleaning products. If a board fails test within the warranty period, it will be replaced at no cost. If a 

Pin 1

Pin 12

Pin 6

8 signals

VCC GND

Pmod Connectors 

– front 

view as loaded on PCB

 

Pmod Pinouts 

JA1: T12 

JB1: K2 

JC1: H3 

JD1: G11 

JA2: V12 

JB2: K1 

JC2: L7 

JD2: F10 

JA3: N10 

JB3: L4 

JC3: K6 

JD3: F11 

JA4: P11 

JB4: L3 

JC4: G3 

JD4: E11 

JA7: M10 

JB7: J3 

JC7: G1 

JD7: D12 

JA8: N9 

JB8: J1 

JC8: J7 

JD8: C12 

JA9: U11 

JB9: K3 

JC9: J6 

JD9: F12 

JA10: V11 

JB10: K5 

JC10: F2 

JD10: E12 

 

Summary of Contents for Nexys 3

Page 1: ...PGA and broad set of peripherals make the Nexys 3 board an ideal host for a wide range of digital systems including embedded processor designs based on Xilinx s MicroBlaze Nexys 3 is compatible with a...

Page 2: ...Host Port Serial Prog Port 2 Micron Parallel PCM P8P BPI Port J8 Programming Mode SLV Serial SPI BPI UP M0 M1 6 pin JTAG Header J7 Prog Programming files are stored in SRAM based memory cells within...

Page 3: ...ce has been programmed it can automatically configure the FPGA at a subsequent power on or reset event as determined by the J8 jumper setting Programming files stored in the PCM devices will remain un...

Page 4: ...nd attach the power supply plug in the USB cable to the PC and to the USB port on the board start the Adept software turn ON Nexys 3 s power switch wait for the FPGA to be recognized Use the browse fu...

Page 5: ...ay to verify many of the board s hardware circuits and interfaces These are divided into two major categories on board memory RAM and Flash and peripherals In both cases the FPGA is configured with te...

Page 6: ...greatly simplifies passing control parameters into a design or reading low frequency status information out of a design 1 6 File I O The File I O tab can transfer files between the PC and the Nexys 3...

Page 7: ...external power supply or battery pack can be used by setting JP1 to Wall The main regulator on the Nexys 3 can accommodate input voltages up to 5 5VDC An external DC wall plug supply should provide a...

Page 8: ...hare a common bus and the serial PCM is on a dedicated quad mode x4 SPI bus The non volatile PCM memories are byte and bit alterable without requiring a block erase so they are faster and more versati...

Page 9: ...alterable without requiring an erase cycle It supports the legacy SPI protocol as well as the newer Quad I O and Dual I O protocols at bus speeds up to 50MHz FPGA configuration files can be written to...

Page 10: ...R20 G14 ADDR11 F17 ADDR2 J18 DATA10 P12 DATA1 T14 ADDR19 D17 ADDR10 F18 ADDR1 K17 DATA9 P6 DATA0 R13 ADDR18 D18 ADDR9 H13 ADDR0 K18 DATA8 N5 ADDR17 H12 ADDR8 H14 DATA7 R5 4 Ethernet PHY The Nexys 3 bo...

Page 11: ...drive any or all of the four clock management tiles in the Spartan 6 Each tile includes two Digital Clock Managers DCMs and four Phase Locked Loops PLLs DCMs provide the four phases of the input freq...

Page 12: ...nto the FPGA two are used as a keyboard port following the keyboard PS 2 protocol and two are used as a mouse port following the mouse PS 2 protocol Two PIC24 I O pins are also connected to the FPGA s...

Page 13: ...ine which ASCII character to use Some keys called extended keys send an E0 ahead of the scan code and they may send more than one scan code When an extended key is released an E0 F0 key up code is sen...

Page 14: ...nate system wherein moving the mouse to the right generates a positive number in the X field and moving to the left generates a negative number Likewise moving the mouse up generates a positive number...

Page 15: ...manate from electron guns which are finely pointed heated cathodes placed in close proximity to a positively charged annular plate called a grid The electrostatic force imposed by the grid pulls rays...

Page 16: ...memory with one or more bytes assigned to each pixel location the Nexys 3 uses three bits per pixel The controller must index into video memory as the beams move across the display and retrieve and a...

Page 17: ...an arrange the counters to easily form video RAM addresses or to minimize decoding logic for sync pulse generation 9 Basic I O The Nexys 3 board includes eight slide switches five push buttons eight i...

Page 18: ...d so any one of 128 patterns can be displayed on a digit by illuminating certain LED segments and leaving the others dark Of these 128 possible patterns the ten corresponding to the decimal digits are...

Page 19: ...n a 1 will be displayed in digit position 1 Then if AN1 is asserted while CA CB and CC are asserted then a 7 will be displayed in digit position 2 If AN0 and CB CC are driven for 4ms and then A1 and C...

Page 20: ...ing commonly powered at 2 5V The connector uses a symmetrical pinout as reflected around the connector s vertical axis so that peripheral boards as well as other system boards can be connected Connect...

Page 21: ...rt A USB mouse can be connected to J4 for a simple visual demonstration If the demo configuration is not present in the BPI device it can be downloaded from the Digilent website and programmed directl...

Page 22: ...Other product and company names mentioned may be trademarks of their respective owners Page 22 of 22 board fails test outside of the warranty period and cannot be easily repaired Digilent can repair...

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