Digilent Nexys 3 Reference Manual Download Page 19

Nexys 3™ FPGA Board Reference Manual 

 

 

Copyright Digilent, Inc. All rights reserved. 

Other product and company names mentioned may be trademarks of their respective owners.

 

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A scanning display controller circuit can be used to show a four-digit number on this display. This circuit drives the 
anode signals and corresponding cathode patterns of each digit in a repeating, continuous succession, at an update 
rate that is faster than the human eye can detect. Each digit is illuminated just one-quarter of the time, but 
because the eye cannot perceive the darkening of a digit before it is illuminated again, the digit appears 
continuously illuminated. If the update or "refresh" rate is slowed to around 45 hertz, most people will begin to 
see the display flicker. 
 
In order for each of the four digits to appear bright and continuously illuminated, all four digits should be driven 
once every 1 to 16ms, for a refresh frequency of 1KHz to 60Hz. For example, in a 60Hz refresh scheme, the entire 
display would be refreshed once every 16ms, 
and each digit would be illuminated for ¼ of 
the refresh cycle, or 4ms. The controller must 
drive the cathodes with the correct pattern 
when the corresponding anode signal is 
driven. To illustrate the process, if AN0 is 
asserted while CB and CC are asserted, then a 
"1" will be displayed in digit position 1. Then, 
if AN1 is asserted while CA, CB and CC are 
asserted, then a "7" will be displayed in digit 
position 2. If AN0 and CB, CC are driven for 
4ms, and then A1 and CA, CB, CC are driven 
for 4ms in an endless succession, the display 
will show "17" in the first two digits. An example timing diagram for a four-digit controller is provided. 
 

10  Expansion Connectors 

The Nexys 3 board has a 68-pin VHDC connector for high-speed/parallel I/O, and an 8-pin Pmod port for lower 
speed and lower pin-count I/O.  

10.1  VHDC Connector 

The VHDC connector includes 40 data signals (routed as 20 impedance-controlled matched pairs), 20 grounds (one 
per pair), and eight power signals. This connector, commonly used for SCSI-3 applications, can accommodate data 
rates of several hundred megahertz on every pin. Both board-to-board and board-to-cable mating connectors are 
available. Data sheets for the VHDC connector and for mating board and cable connectors can be found on the 
Digilent website, as well as on other vendor and distributor websites. Mating connectors and cables of various 
lengths are also available from Digilent and from distributors. 

 

An un-illuminated seven-segment display, and nine 
illumination patterns corresponding to decimal digits

 

AN1

AN2

AN3

AN4

Cathodes

Digit 0

Refresh period = 1ms to 16ms

Digit period = Refresh / 4

Digit 1

Digit 2

Digit 3

 

A

F

E

D

C

B

G

Common anode

Individual cathodes

DP

AN3

AN2

AN1

AN0

CA CB CC CD CE CF CG DP

Four-digit Seven 

Segment Display

 

Summary of Contents for Nexys 3

Page 1: ...PGA and broad set of peripherals make the Nexys 3 board an ideal host for a wide range of digital systems including embedded processor designs based on Xilinx s MicroBlaze Nexys 3 is compatible with a...

Page 2: ...Host Port Serial Prog Port 2 Micron Parallel PCM P8P BPI Port J8 Programming Mode SLV Serial SPI BPI UP M0 M1 6 pin JTAG Header J7 Prog Programming files are stored in SRAM based memory cells within...

Page 3: ...ce has been programmed it can automatically configure the FPGA at a subsequent power on or reset event as determined by the J8 jumper setting Programming files stored in the PCM devices will remain un...

Page 4: ...nd attach the power supply plug in the USB cable to the PC and to the USB port on the board start the Adept software turn ON Nexys 3 s power switch wait for the FPGA to be recognized Use the browse fu...

Page 5: ...ay to verify many of the board s hardware circuits and interfaces These are divided into two major categories on board memory RAM and Flash and peripherals In both cases the FPGA is configured with te...

Page 6: ...greatly simplifies passing control parameters into a design or reading low frequency status information out of a design 1 6 File I O The File I O tab can transfer files between the PC and the Nexys 3...

Page 7: ...external power supply or battery pack can be used by setting JP1 to Wall The main regulator on the Nexys 3 can accommodate input voltages up to 5 5VDC An external DC wall plug supply should provide a...

Page 8: ...hare a common bus and the serial PCM is on a dedicated quad mode x4 SPI bus The non volatile PCM memories are byte and bit alterable without requiring a block erase so they are faster and more versati...

Page 9: ...alterable without requiring an erase cycle It supports the legacy SPI protocol as well as the newer Quad I O and Dual I O protocols at bus speeds up to 50MHz FPGA configuration files can be written to...

Page 10: ...R20 G14 ADDR11 F17 ADDR2 J18 DATA10 P12 DATA1 T14 ADDR19 D17 ADDR10 F18 ADDR1 K17 DATA9 P6 DATA0 R13 ADDR18 D18 ADDR9 H13 ADDR0 K18 DATA8 N5 ADDR17 H12 ADDR8 H14 DATA7 R5 4 Ethernet PHY The Nexys 3 bo...

Page 11: ...drive any or all of the four clock management tiles in the Spartan 6 Each tile includes two Digital Clock Managers DCMs and four Phase Locked Loops PLLs DCMs provide the four phases of the input freq...

Page 12: ...nto the FPGA two are used as a keyboard port following the keyboard PS 2 protocol and two are used as a mouse port following the mouse PS 2 protocol Two PIC24 I O pins are also connected to the FPGA s...

Page 13: ...ine which ASCII character to use Some keys called extended keys send an E0 ahead of the scan code and they may send more than one scan code When an extended key is released an E0 F0 key up code is sen...

Page 14: ...nate system wherein moving the mouse to the right generates a positive number in the X field and moving to the left generates a negative number Likewise moving the mouse up generates a positive number...

Page 15: ...manate from electron guns which are finely pointed heated cathodes placed in close proximity to a positively charged annular plate called a grid The electrostatic force imposed by the grid pulls rays...

Page 16: ...memory with one or more bytes assigned to each pixel location the Nexys 3 uses three bits per pixel The controller must index into video memory as the beams move across the display and retrieve and a...

Page 17: ...an arrange the counters to easily form video RAM addresses or to minimize decoding logic for sync pulse generation 9 Basic I O The Nexys 3 board includes eight slide switches five push buttons eight i...

Page 18: ...d so any one of 128 patterns can be displayed on a digit by illuminating certain LED segments and leaving the others dark Of these 128 possible patterns the ten corresponding to the decimal digits are...

Page 19: ...n a 1 will be displayed in digit position 1 Then if AN1 is asserted while CA CB and CC are asserted then a 7 will be displayed in digit position 2 If AN0 and CB CC are driven for 4ms and then A1 and C...

Page 20: ...ing commonly powered at 2 5V The connector uses a symmetrical pinout as reflected around the connector s vertical axis so that peripheral boards as well as other system boards can be connected Connect...

Page 21: ...rt A USB mouse can be connected to J4 for a simple visual demonstration If the demo configuration is not present in the BPI device it can be downloaded from the Digilent website and programmed directl...

Page 22: ...Other product and company names mentioned may be trademarks of their respective owners Page 22 of 22 board fails test outside of the warranty period and cannot be easily repaired Digilent can repair...

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