Digilent Nexys 3 Reference Manual Download Page 15

Nexys 3™ FPGA Board Reference Manual 

 

 

Copyright Digilent, Inc. All rights reserved. 

Other product and company names mentioned may be trademarks of their respective owners.

 

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video color signals that proceed in equal increments between 0V (fully off) and 0.7V (fully on). Using this circuit, 
256 different colors can be displayed, one for each unique 8-bit pattern. A video controller circuit must be created 
in the FPGA to drive the sync and color signals with the correct timing in order to produce a working display 
system. 

8.1  VGA System Timing 

VGA signal timings are specified, published, 
copyrighted and sold by the VESA organization 
(www.vesa.org). The following VGA system timing 
information is provided as an example of how a VGA 
monitor might be driven in 640 by 480 mode. For 
more precise information, or for information on other 
VGA frequencies, refer to documentation available at 
the VESA website. 

CRT-based VGA displays use amplitude-modulated 
moving electron beams (or cathode rays) to display 
information on a phosphor-coated screen. LCD 
displays use an array of switches that can impose a 
voltage across a small amount of liquid crystal, thereby 
changing light permittivity through the crystal on a 
pixel-by-pixel basis. Although the following description is limited to CRT displays, LCD displays have evolved to use 
the same signal timings as CRT displays (so the "signals" discussion below pertains to both CRTs and LCDs). Color 
CRT displays use three electron beams (one for red, one for blue, and one for green) to energize the phosphor that 
coats the inner side of the display end of a cathode ray tube (see illustration). Electron beams emanate from 
"electron guns" which are finely-pointed heated cathodes placed in close proximity to a positively charged annular 
plate called a "grid". The electrostatic force imposed by the grid pulls rays of energized electrons from the 
cathodes, and those rays are fed by the current that flows into the cathodes. These particle rays are initially 
accelerated towards the grid, but they soon fall under the influence of the much larger electrostatic force that 
results from the entire phosphor-coated display surface of the CRT being charged to 20kV (or more). The rays are 
focused to a fine beam as they pass through the center of the grids, and then they accelerate to impact on the 
phosphor-coated display surface. The phosphor surface glows brightly at the impact point, and it continues to glow 
for several hundred microseconds after the beam is removed. The larger the current fed into the cathode, the 
brighter the phosphor will glow. 

Between the grid and the display surface, the beam passes through the neck of the CRT where two coils of wire 
produce orthogonal electromagnetic fields. Because cathode rays are composed of charged particles (electrons), 
they can be deflected by these magnetic fields. Current waveforms are passed through the coils to produce 
magnetic fields that interact with the cathode rays and cause them to transverse the display surface in a "raster" 
pattern, horizontally from left to right and vertically from top to bottom. As the cathode ray moves over the 
surface of the display, the current sent to the electron guns can be increased or decreased to change the 
brightness of the display at the cathode ray impact point. 

Anode (entire screen)

High voltage 

supply (>20kV)

Deflection coils

Grid

Electron guns
(Red, Blue, Green)

gun

control

grid

control

deflection

control

R,G,B signals 
(to guns)

Cathode ray tube

Cathode ray

VGA 
cable

 

 

Summary of Contents for Nexys 3

Page 1: ...PGA and broad set of peripherals make the Nexys 3 board an ideal host for a wide range of digital systems including embedded processor designs based on Xilinx s MicroBlaze Nexys 3 is compatible with a...

Page 2: ...Host Port Serial Prog Port 2 Micron Parallel PCM P8P BPI Port J8 Programming Mode SLV Serial SPI BPI UP M0 M1 6 pin JTAG Header J7 Prog Programming files are stored in SRAM based memory cells within...

Page 3: ...ce has been programmed it can automatically configure the FPGA at a subsequent power on or reset event as determined by the J8 jumper setting Programming files stored in the PCM devices will remain un...

Page 4: ...nd attach the power supply plug in the USB cable to the PC and to the USB port on the board start the Adept software turn ON Nexys 3 s power switch wait for the FPGA to be recognized Use the browse fu...

Page 5: ...ay to verify many of the board s hardware circuits and interfaces These are divided into two major categories on board memory RAM and Flash and peripherals In both cases the FPGA is configured with te...

Page 6: ...greatly simplifies passing control parameters into a design or reading low frequency status information out of a design 1 6 File I O The File I O tab can transfer files between the PC and the Nexys 3...

Page 7: ...external power supply or battery pack can be used by setting JP1 to Wall The main regulator on the Nexys 3 can accommodate input voltages up to 5 5VDC An external DC wall plug supply should provide a...

Page 8: ...hare a common bus and the serial PCM is on a dedicated quad mode x4 SPI bus The non volatile PCM memories are byte and bit alterable without requiring a block erase so they are faster and more versati...

Page 9: ...alterable without requiring an erase cycle It supports the legacy SPI protocol as well as the newer Quad I O and Dual I O protocols at bus speeds up to 50MHz FPGA configuration files can be written to...

Page 10: ...R20 G14 ADDR11 F17 ADDR2 J18 DATA10 P12 DATA1 T14 ADDR19 D17 ADDR10 F18 ADDR1 K17 DATA9 P6 DATA0 R13 ADDR18 D18 ADDR9 H13 ADDR0 K18 DATA8 N5 ADDR17 H12 ADDR8 H14 DATA7 R5 4 Ethernet PHY The Nexys 3 bo...

Page 11: ...drive any or all of the four clock management tiles in the Spartan 6 Each tile includes two Digital Clock Managers DCMs and four Phase Locked Loops PLLs DCMs provide the four phases of the input freq...

Page 12: ...nto the FPGA two are used as a keyboard port following the keyboard PS 2 protocol and two are used as a mouse port following the mouse PS 2 protocol Two PIC24 I O pins are also connected to the FPGA s...

Page 13: ...ine which ASCII character to use Some keys called extended keys send an E0 ahead of the scan code and they may send more than one scan code When an extended key is released an E0 F0 key up code is sen...

Page 14: ...nate system wherein moving the mouse to the right generates a positive number in the X field and moving to the left generates a negative number Likewise moving the mouse up generates a positive number...

Page 15: ...manate from electron guns which are finely pointed heated cathodes placed in close proximity to a positively charged annular plate called a grid The electrostatic force imposed by the grid pulls rays...

Page 16: ...memory with one or more bytes assigned to each pixel location the Nexys 3 uses three bits per pixel The controller must index into video memory as the beams move across the display and retrieve and a...

Page 17: ...an arrange the counters to easily form video RAM addresses or to minimize decoding logic for sync pulse generation 9 Basic I O The Nexys 3 board includes eight slide switches five push buttons eight i...

Page 18: ...d so any one of 128 patterns can be displayed on a digit by illuminating certain LED segments and leaving the others dark Of these 128 possible patterns the ten corresponding to the decimal digits are...

Page 19: ...n a 1 will be displayed in digit position 1 Then if AN1 is asserted while CA CB and CC are asserted then a 7 will be displayed in digit position 2 If AN0 and CB CC are driven for 4ms and then A1 and C...

Page 20: ...ing commonly powered at 2 5V The connector uses a symmetrical pinout as reflected around the connector s vertical axis so that peripheral boards as well as other system boards can be connected Connect...

Page 21: ...rt A USB mouse can be connected to J4 for a simple visual demonstration If the demo configuration is not present in the BPI device it can be downloaded from the Digilent website and programmed directl...

Page 22: ...Other product and company names mentioned may be trademarks of their respective owners Page 22 of 22 board fails test outside of the warranty period and cannot be easily repaired Digilent can repair...

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