![Diamond Systems Poseidon User Manual Download Page 63](http://html1.mh-extra.com/html/diamond-systems/poseidon/poseidon_user-manual_2494418063.webp)
Interrupt and A/D Clock Status: Base+9 (Read)
Bit:
7
6
5
4
3
2
1
0
Name:
ADINT
DINT
TINT
-
DMAEN
P2
CLKEN
CLKSEL
ADINT
A/D interrupt status; Cleared by writing to INTRST (Base+8).
1 = A/D interrupt request has occurred.
0 = No interrupt request.
DINT
Digital interrupt status; Cleared by writing to INTRST (Base+8).
1 = Digital interrupt request has occurred.
0 = No interrupt request.
TINT
Timer interrupt status; Cleared by writing to INTRST (Base+8).
1 = Timer interrupt request has occurred.
0 = No interrupt request.
DMAEN
Read-back of control register bit defined, above.
P2
Read-back of P2 register bit defined at Base+8/write.
CLKEN
Read-back of control register bit defined, above.
CLKSEL
Read-back of control register bit defined, above.
Diamond Systems Corporation
Poseidon User Manual
Page 63