Diamond Systems ETX-945 User Manual Download

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ETX-945 User Manual

High-Performance ETX 3.0 Compliant Computer-on-Modules

FOR TECHNICAL SUPPORT

Diamond Systems Corporation

PLEASE CONTACT:

1255 Terra Bella Ave.

Mountain View, CA 94043 USA

[email protected]

Tel 1-650-810-2500

Fax 1-650-810-2525

www.diamondsystems.com

Revision

Date

Comment

1.00

Initial Release

1.01

May 2010

Minor Update

1.02

March 2011

Removed watchdog timer information

Summary of Contents for ETX-945

Page 1: ...PPORT Diamond Systems Corporation PLEASE CONTACT 1255 Terra Bella Ave Mountain View CA 94043 USA support diamondsystems com Tel 1 650 810 2500 Fax 1 650 810 2525 www diamondsystems com Revision Date C...

Page 2: ...4 7 Other Settings and Utilities 14 3 5 Operating System Drivers 14 3 6 BIOS Beep Code List 14 4 INTERFACE CONNECTOR DETAILS 15 4 1 ETX1 Connector 16 4 1 1 PCI bus signals 17 4 1 2 USB signals 18 4 1...

Page 3: ...try depending on what is near the corner Most of our boards are designed with at least 25 mils clearance between the board edge and any component pad and ground power planes are at least 20 mils from...

Page 4: ...2 Cache ULV Intel Core Duo 667 MHz FSB and 2MB L2 Cache LV Intel Core Duo 533 MHz FSB and 2MB L2 Cache ULV Intel Celeron 533 MHz FSB and 1MB L2 Cache M ULV The following processor when included is pla...

Page 5: ...erating temperature ETX 945 T7400 20 o to 71 o C operating temperature 0 to 90 operating humidity non condensing BIOS Phoenix Award PnP flash BIOS Note The ETX 3 0 specification is available for downl...

Page 6: ...er Manual 1 02 www diamondsystems com Page 6 2 FUNCTIONAL OVERVIEW 2 1 Block Diagram Figure 1 shows the ETX 945 COM s functional blocks ETX bus and peripheral interface signals Figure 1 Functional Blo...

Page 7: ...Dimensions Mounting Holes and Connectors The two diagrams below show the mechanical dimensions of the ETX 945 s board outline and five mounting holes as well as the position of all connectors on both...

Page 8: ...ETX 945 User Manual 1 02 www diamondsystems com Page 8 Figure 3 Board Layout Bottom...

Page 9: ...d in greater detail in Section 4 of this document 2 4 ETX Bus Connectors Connector Location Pins Function ETX1 Bottom 100 PCI bus USB ports audio interface serial IRQ ETX2 Bottom 100 ISA bus ETX3 Bott...

Page 10: ...nd or accessories Always store this product in ESD protective packaging when not in use Please refer to page 3 of this manual Important Safe Handling Information for further details 3 GETTING STARTED...

Page 11: ...rs for system I O CompactFlash PC 104 Plus expansion two additional serial ports RS 232 422 485 buffering a digital I O port and a second Ethernet LAN interface EPIC form factor development kit Provid...

Page 12: ...applied to the ETX 945 launches the BIOS Setup utility Watch for the following message Press DEL to Enter Setup The BIOS Setup utility s main menu provides access to the following configuration and s...

Page 13: ...04x678 24 bit TV output NTSC PAL 3 4 4 Integrated Peripherals This Setup section offers the ability to configure various onboard functions and peripheral controllers including enable disable mode and...

Page 14: ...tem boot password Exit Setup with or without saving changes 3 5 Operating System Drivers Drivers for Windows XP and Linux 2 6 if required are included on the Software and Documentation CD that is prov...

Page 15: ...ation which provides more detail regarding the signals present on the ETX1 ETX2 ETX3 and ETX4 connectors is available from the ETX Industrial Group s website http www etx ig de specs specs php Also av...

Page 16: ...REQ3 9 10 GNT3 LOCK 59 60 DEVSEL GNT2 11 12 3V TRDY 61 62 USB3 REQ2 13 14 GNT1 IRDY 63 64 STOP REQ1 15 16 3V FRAME 65 66 USB2 GNT0 17 18 RESERVED GND 67 68 GND VCC 19 20 VCC AD16 69 70 CBE2 SERIRQ 21...

Page 17: ...l PCI devices Out REQ0 3 Bus Request signals of PCI Masters In GNT0 3 Grant signals to PCI Masters Out AD0 31 PCI address and data bus signals In Out CBE0 3 PCI Bus command and byte enables In Out PAR...

Page 18: ...Port 0 data In Out USB1 USB Port 1 data In Out USB1 USB Port 1 data In Out USB2 USB Port 2 data In Out USB2 USB Port 2 data In Out USB3 USB Port 3 data In Out USB3 USB Port 3 data In Out 4 1 3 Audio...

Page 19: ...as indicated Signal Name Signal Function Direction VCC 5V 5 DC power input In GND Power ground n a 3V 3 3V 5 supply generated on the ETX module for powering external devices 500mA max external load O...

Page 20: ...11 12 DREQ6 SA10 61 62 REFSH SD9 13 14 DACK6 SA11 63 64 DREQ1 SD8 15 16 DREQ5 SA12 65 66 DACK1 MEMW 17 18 DACK5 GND 67 68 GND MEMR 19 20 DREQ0 SA13 69 70 DREQ3 LA17 21 22 DACK0 SA14 71 72 DACK3 LA18 2...

Page 21: ...ETECT 9 10 DDDA IRRX 59 60 ERR HDSEL LCDDO16 11 12 LCDDO18 IRTX 61 62 PD6 RESERVED LCDDO17 13 14 LCDDO19 RXD2 63 64 INIT DIR GND 15 16 GND GND 65 66 GND LCDDO13 17 18 LCDDO15 RTS2 67 68 PD5 RESERVED L...

Page 22: ...DDC interface between the board s graphics controller and a monitor In Out DDDA Display Data Channel Data for DDC interface between the board s graphics controller and a monitor In Out 4 3 2 TV video...

Page 23: ...e pins carry data and control information to from the board s two serial ports as indicated These pins provide logic level signaling and require external I O buffering if RS 232 RS 422 or RS 485 signa...

Page 24: ...6 Parallel port interface These pins carry data and control information to from the board s bidirectional parallel port as indicated Signal Name Signal Function Direction LPT FLPY Interface configurat...

Page 25: ...K0 Track 0 indicator In WP Write protect indicator In RDATA Read data from drive In DSKCHG Drive door opened indicator In HDSEL Head select 0 1 control Out DIR Step head step direction control Out STE...

Page 26: ...4 3 8 Miscellaneous functions These pins carry power and ground signals and a GPIO signal as indicated Signal Name Signal Function Direction VCC 5V 5 DC power input In GND Power ground In Out RESERVE...

Page 27: ...D13 63 64 PIDE_D1 EXT_PRG 15 16 I2CLK GND 65 66 GND VCC 17 18 VCC SIDE_D2 67 68 PIDE_D13 OVCR 19 20 GPCS SIDE_D12 69 70 PIDE_D2 EXTSMI 21 22 I2DAT SIDE_D3 71 72 PIDE_D12 SMBCLK 23 24 SMBDATA SIDE_D11...

Page 28: ...s in Ultra 33 mode Out PIDE_INTRQ Primary channel interrupt request In Out SIDE_D0 15 Secondary IDE ATA bidirectional data bus In Out SIDE_A0 2 Secondary IDE ATA address bus Out SIDE_CS1 Secondary IDE...

Page 29: ...d LED on 100Mbps off 10Mbps Out 4 4 3 Power control and management These pins support various power management and control functions in conjunction with the board s ACPI BIOS functionality and system...

Page 30: ...tional I 2 C Bus clock signal I O I2DAT Bidirectional I 2 C Bus data signal I O SMBCLK Bidirectional SM Bus clock signal I O SMBDATA Bidirectional SM Bus data signal I O KBINH Keyboard inhibit signal...

Page 31: ...EFERENCE 5 1 BIOS Memory Mapping Address Device Description E000 0000h F000 FFFFh System BIOS Area D000 2000h D000 FFFFh Free space D000 0000h D000 FFFh LAN ROM C000 E000h CF00 FFFFh Free space C000 0...

Page 32: ...2 Key or Microsoft Natural PS 2 Keyboard 00000061 00000061 System Speaker 00000062 00000063 Motherboard Resource 00000064 00000064 Standard 0 02 Key or Microsoft Natural PS 2 Keyboard 00000065 0000006...

Page 33: ...077B Printer Port LPT 00000880 0000088F Motherboard Resource 00000A78 00000A7B Motherboard Resource 00000BBC 00000BBF Motherboard Resource 00000BBC 00000BBF Motherboard Resource 00000D00 0000FFFF PCI...

Page 34: ...14 Primary IDE Channel IRQ 15 Intel 8280 G ICH7 Family SMBus Controller 27DA IRQ 16 Intel 8280 G ICH7 Family PCI Express Root Port 27D0 IRQ 16 Intel 8280 G ICH7 Family USB Universal Host Controller 27...

Page 35: ...04h Reserved 05h Blank out screen Clear CMOS error flag 06h Reserved 07h Clear 8042 interface Initialize 8042 self test 08h Test special keyboard controller for Winbond 977 series Super I O chips enab...

Page 36: ...alue Load CMOS settings into BIOS stack If CMOS checksum fails use default value instead Prepare BIOS resource map for PCI PnP use If ESCD is valid take into consideration of the ESCD s legacy informa...

Page 37: ...M CPU initialize L2 cache for P6 class CPU and program cacheable range Initialize the APIC for P6 class CPU On MP platform adjust the cacheable range to smaller one in case the cacheable ranges betwe...

Page 38: ...ISA PnP devices Auto assign ports to onboard COM ports if the corresponding item in Setup is set to AUTO 6Eh Reserved 6Fh Initialize floppy controller Setup floppy related fields in 40 hardware 70 72...

Page 39: ...nvoke ISA adapter ROMs Assign IRQs to PCI devices Initialize APM Clear noise of IRQs 86 92h Reserved 93h Read HDD boot sector information for Trend Anti Virus code 94h Enable L2 cache Program boot up...

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