EEPROM Command/Trim DAC Address: Base+13 (Write)
Bit:
7
6
5
4
3
2
1
0
Name:
EEM_CA7 EEM_CA6 EEM_CA5 EEM_CA4 EEM_CA3 EEM_CA2/
TDAA2
EEM_CA1/
TDAA1
EEM_CA0/
TDAA0
EEM_CA7-
EEM_CA0
EEPROM command address when EEPROM write enable. Can only write data when EEMBSY
(base+14) is cleared.
TDAA2-
TDAA0
TrimDAC address, 8x8 bytes.
0: Q1,DAC1 ADCOFF range adjustment.
1: Q2,DAC2 ADCOFF fine adjustment.
2: Q3,DAC3 ADCFUL range adjustment.
3: Q4,DAC4 ADCFUL fine adjustment.
4: Q5,DAC5 DACOFF range adjustment.
5: Q6,DAC6 DACOFF fine adjustment.
6: Q7,DAC7 DACFUL range adjustment.
7: Q8,DAC8 DACFUL fine adjustment.
TrimDAC address can be written by writing to this register or through the EEM mode (). TrimDAC
data can only be written when TDABSY (base+14) is not set.
Reset value is zero.
EEM Command Address: Base+13 (Read)
Bit:
7
6
5
4
3
2
1
0
Name:
EEM_CA7-EEM_CA0
EEM_CA7-
EEM_CA0
EEPROM command address.
Diamond Systems Corporation
Athena II User Manual
Page 67
