Page 0 Register Definitions
Command: Base+0 (Write)
Bit:
7
6
5
4
3
2
1
0
Name:
STRTAD
RSTBRD
RSTDA
RSTFIFO CLRDMA
CLRT
CLRD
CLRA
STRTAD
Start an A/D conversion (trigger the A/D) when in software-trigger mode AINTE = 0 (Base+4, bit 0).
Once the program writes to this bit, the A/D conversion starts and the STS bit (base+3, bit 7) goes
high. The program should then monitor STS and wait for it to go low (the value of Base+3 is less than
128 or 0x80). When STS goes, low the A/D data at Base+0 and Base+1 may be read.
When AINTE = 1 (Base+4, bit 0), the A/D cannot be triggered by writing to this bit. Instead, the A/D
is triggered by a signal selected by ADCLK (Base+4 bit 5).
RSTBRD
Reset the entire board excluding the D/A. Writing a 1 to this bit causes all on-board registers to be
reset to 0. The effect on the digital I/O is that all ports are reset to input mode, and the logic state of
their pins is determined by the pull-up/pull-down configuration setting selected by the user. All A/D,
counter/timer, interrupt and DMA functions cease. However, the D/A values remain constant.
RSTDA
Reset the four analog outputs. The analog outputs are reset to either mid-scale or zero-scale,
depending on the jumper configuration selected by the user. A separate reset is provided for the D/A
so that the user may reset the board if needed without affecting the circuitry connected to the analog
outputs.
RSTFIFO
Reset the FIFO depth to 0. This clears the FIFO, allowing additional A/D conversions to be stored in
the FIFO starting at address 0.
CLRDMA Writing a 1 to this bit resets the DMA interrupt request flip flop.
CLRT
Writing a 1 to this bit resets the timer interrupt request flip flop.
CLRD
Writing a 1 to this bit resets the digital I/O interrupt request flip flop.
CLRA
Writing a 1 to this bit resets the analog interrupt request flip flop.
•
This register performs various functions. The register bits are not data bits
but, instead, command triggers. Each function is initiated by writing a 1 to a
particular bit. Writing a 1 to any bit in this register does not affect any other
bit in this register. For example, to reset the FIFO, write the value 0x10 (16)
to this register to write a 1 to bit 4. No other function of the register will be
performed. Multiple actions can be performed, simultaneously, by writing a 1
to multiple bits, using a single write operation.
•
The user’s interrupt routine must write to the appropriate bit prior to exiting to reset the interrupt request
flip flop, enabling future interrupts. Otherwise, the interrupt line remains high, indefinitely, and no
additional interrupt requests are generated by the board.
Diamond Systems Corporation
Athena II User Manual
Page 54