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Chapter 3 Hardware Installation
19
Chapter 3
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Signal
Pin#
Pin Type
Pwr Rail /Tolerance
AL9A2
Carrier Board
Description
SER0_TX
A98
O CMOS
5V / 12V(design 3.3v~5V
tolerant)
PD 4.7K
General purpose serial port 0 transmitter
SER0_RX
A99
I CMOS
5V / 12V(design 3.3v~5V
tolerant)
General purpose serial port 0 receiver
SER1_TX
A101
O CMOS
5V / 12V(design 3.3v~5V
tolerant)
PD 4.7K
General purpose serial port 1 transmitter
SER1_RX
A102
I CMOS
5V / 12V(design 3.3v~5V
tolerant)
General purpose serial port 1 receiver
Signal
Pin#
Pin Type
Pwr Rail /Tolerance
AL9A2
Carrier Board
Description
I2C_CK
B33
I/O OD CMOS 3.3V Suspend/3.3V
PU 2.2K to 3V3SB
General purpose I2C port clock output
I2C_DAT
B34
I/O OD CMOS 3.3V Suspend/3.3V
PU 2.2K to 3V3SB
General purpose I2C port data I/O line
SPKR
B32
O CMOS
3.3V / 3.3V
PU 10K to 3V3SB
Output for audio enunciator - the "speaker" in PC-AT systems.
This port provides the PC beep signal and is mostly intended for
debugging purposes.
WDT
B27
O CMOS
3.3V / 3.3V
Output indicating that a watchdog time-out event has occurred.
FAN_PWMOUT
B101
O OD CMOS
3.3V / 12V
Fan speed control. Uses the Pulse Width Modulation (PWM) technique to control the fan's RPM.
FAN_TACHIN
B102
I OD CMOS
3.3V / 12V
Fan tachometer input for a fan with a two pulse output.
TPM_PP
A96
I CMOS
3.3V / 3.3V
NC
Trusted Platform Module (TPM) Physical Presence pin. Active high.
TPM chip has an internal pull down. This signal is used to indicate
Physical Presence to the TPM.
(NC for AL9A2)
Signal
Pin#
Pin Type
Pwr Rail /Tolerance
AL9A2
Carrier Board
Description
PWRBTN#
B12
I CMOS
3.3V Suspend/3.3V
PU 10K to 3V3SB
A falling edge creates a power button event. Power button events can
be used to bring a system out of S5 soft off and other suspend states,
as well as powering the system down.
SYS_RESET#
B49
I CMOS
3.3V Suspend/3.3V
PU 4.7K to 3V3SB
Reset button input. Active low request for Module to reset and reboot.
May be falling edge sensitive. For situations when SYS_RESET# is
not able to reestablish control of the system, PWR_OK or a power
cycle may be used.
CB_RESET#
B50
O CMOS
3.3V Suspend/3.3V
Reset output from Module to Carrier Board. Active low. Issued by
Module chipset and may result from a low SYS_RESET# input, a low
PWR_OK input, a VCC_12V power input that falls below the minimum
specification, a watchdog timeout, or may be initiated by the Module
software.
PWR_OK
B24
I CMOS
3.3V / 3.3V
PU 10K to 3.3VSB
Power OK from main power supply. A high value indicates that the
power is good. This signal can be used to hold off Module startup to
allow Carrier based FPGAs or other configurable devices time to be
programmed.
SUS_STAT#
B18
O CMOS
3.3V Suspend/3.3V
Indicates imminent suspend operation; used to notify LPC devices.
SUS_S3#
A15
O CMOS
3.3V Suspend/3.3V
Indicates system is in Suspend to RAM state. Active low output. An
inverted copy of SUS_S3# on the Carrier Board may be used to
enable the non-standby power on a typical ATX supply.
SUS_S4#
A18
O CMOS
3.3V Suspend/3.3V
Indicates system is in Suspend to Disk state. Active low output.
SUS_S5#
A24
O CMOS
3.3V Suspend/3.3V
Indicates system is in Soft Off state.
WAKE0#
B66
I CMOS
3.3V Suspend/3.3V
PU 1K to 3.3VSB
PCI Express wake up signal.
WAKE1#
B67
I CMOS
3.3V Suspend/3.3V
PU 1K to 3.3VSB
General purpose wake up signal. May be used to implement wake-up
on PS2 keyboard or mouse activity.
BATLOW#
A27
I CMOS
3.3V Suspend/ 3.3V
PU 4.7K to 3.3VSB
Indicates that external battery is low.
This port provides a battery-low signal to the Module for orderly
transitioning to power saving or power cut-off ACPI modes.
Serial Interface Signals Descriptions
Miscellaneous Signal Descriptions
Power and System Management Signals Descriptions
