57
MSP430G2x32
MSP430G2x02
www.ti.com
SLAS723F –DECEMBER 2010–REVISED MAY 2012
TERMINAL FUNCTIONS
Table 2. Terminal Functions
TERMINAL
NO.
I/O
DESCRIPTION
NAME
N14,
RSA1
N20,
PW14
6
PW20
P1.0/
General-purpose digital I/O pin
TA0CLK/
Timer0_A, clock signal TACLK input
2
1
2
I/O
ACLK/
ACLK signal output
A0
ADC10 analog input A0
(1)
P1.1/
General-purpose digital I/O pin
TA0.0/
3
2
3
I/O
Timer0_A, capture: CCI0A input, compare: Out0 output
A1
ADC10 analog input A1
(1)
P1.2/
General-purpose digital I/O pin
TA0.1/
4
3
4
I/O
Timer0_A, capture: CCI1A input, compare: Out1 output
A2
ADC10 analog input A2
(1)
P1.3/
General-purpose digital I/O pin
ADC10CLK/
ADC10, conversion clock output
(1)
5
4
5
I/O
A3/
ADC10 analog input A3
(1)
VREF-/VEREF
ADC10 negative reference voltage
(1)
P1.4/
General-purpose digital I/O pin
TA0.2/
Timer0_A, capture: CCI2A input, compare: Out2 output
SMCLK/
SMCLK signal output
6
5
6
I/O
A4/
ADC10 analog input A4
(1)
VREF+/VEREF+/
ADC10 positive reference voltage
(1)
TCK
JTAG test clock, input terminal for device programming and test
P1.5/
General-purpose digital I/O pin
TA0.0/
Timer0_A, compare: Out0 output
A5/
7
6
7
I/O
ADC10 analog input A5
(1)
SCLK/
USI: clk input in I2C mode; clk in/output in SPI mode
TMS
JTAG test mode select, input terminal for device programming and test
P1.6/
General-purpose digital I/O pin
TA0.1/
Timer0_A, compare: Out1 output
A6/
ADC10 analog input A6
(1)
SDO/
8
7
14
I/O
USI: Data output in SPI mode
SCL/
USI: I2C clock in I2C mode
TDI/
JTAG test data input or test clock input during programming and test
TCLK
P1.7/
General-purpose digital I/O pin
A7/
ADC10 analog input A7
(1)
SDI/
9
8
15
I/O
USI: Data input in SPI mode
SDA/
USI: I2C data in I2C mode
TDO/TDI
(2)
JTAG test data output terminal or test data input during programming and test
P2.0
-
-
8
I/O
General-purpose digital I/O pin
P2.1
-
-
9
I/O
General-purpose digital I/O pin
P2.2
-
-
10
I/O
General-purpose digital I/O pin
P2.3
-
-
11
I/O
General-purpose digital I/O pin
(1) Available only on MSP430G2x32 devices.
(2) TDO or TDI is selected via JTAG instruction.
Copyright © 2010–2012, Texas Instruments Incorporated
Submit Documentation Feedback
5
MSP430G2x32
MSP430G2x02
www.ti.com
SLAS723F –DECEMBER 2010–REVISED MAY 2012
TERMINAL FUNCTIONS
Table 2. Terminal Functions
TERMINAL
NO.
I/O
DESCRIPTION
NAME
N14,
RSA1
N20,
PW14
6
PW20
P1.0/
General-purpose digital I/O pin
TA0CLK/
Timer0_A, clock signal TACLK input
2
1
2
I/O
ACLK/
ACLK signal output
A0
ADC10 analog input A0
(1)
P1.1/
General-purpose digital I/O pin
TA0.0/
3
2
3
I/O
Timer0_A, capture: CCI0A input, compare: Out0 output
A1
ADC10 analog input A1
(1)
P1.2/
General-purpose digital I/O pin
TA0.1/
4
3
4
I/O
Timer0_A, capture: CCI1A input, compare: Out1 output
A2
ADC10 analog input A2
(1)
P1.3/
General-purpose digital I/O pin
ADC10CLK/
ADC10, conversion clock output
(1)
5
4
5
I/O
A3/
ADC10 analog input A3
(1)
VREF-/VEREF
ADC10 negative reference voltage
(1)
P1.4/
General-purpose digital I/O pin
TA0.2/
Timer0_A, capture: CCI2A input, compare: Out2 output
SMCLK/
SMCLK signal output
6
5
6
I/O
A4/
ADC10 analog input A4
(1)
VREF+/VEREF+/
ADC10 positive reference voltage
(1)
TCK
JTAG test clock, input terminal for device programming and test
P1.5/
General-purpose digital I/O pin
TA0.0/
Timer0_A, compare: Out0 output
A5/
7
6
7
I/O
ADC10 analog input A5
(1)
SCLK/
USI: clk input in I2C mode; clk in/output in SPI mode
TMS
JTAG test mode select, input terminal for device programming and test
P1.6/
General-purpose digital I/O pin
TA0.1/
Timer0_A, compare: Out1 output
A6/
ADC10 analog input A6
(1)
SDO/
8
7
14
I/O
USI: Data output in SPI mode
SCL/
USI: I2C clock in I2C mode
TDI/
JTAG test data input or test clock input during programming and test
TCLK
P1.7/
General-purpose digital I/O pin
A7/
ADC10 analog input A7
(1)
SDI/
9
8
15
I/O
USI: Data input in SPI mode
SDA/
USI: I2C data in I2C mode
TDO/TDI
(2)
JTAG test data output terminal or test data input during programming and test
P2.0
-
-
8
I/O
General-purpose digital I/O pin
P2.1
-
-
9
I/O
General-purpose digital I/O pin
P2.2
-
-
10
I/O
General-purpose digital I/O pin
P2.3
-
-
11
I/O
General-purpose digital I/O pin
(1) Available only on MSP430G2x32 devices.
(2) TDO or TDI is selected via JTAG instruction.
Copyright © 2010–2012, Texas Instruments Incorporated
Submit Documentation Feedback
5
Summary of Contents for DSD-500
Page 37: ...37 Personal notes ...
Page 47: ...STBY POWER GND POWER POWER 8 7 6 5 4 3 2 1 A B C D E F 47 SCHEMATIC DIAGRAMS 10 10 SMPS ...
Page 50: ...50 Personal notes Personal notes ...
Page 54: ...54 PACKING VIEW ...
Page 60: ...60 PIC24FJ256GA106_ U12 ...
Page 63: ...63 WM8782_ U29 _Pin_Function WM8782_ U29 _Top_View ...
Page 68: ...68 Personal notes ...