Denon DCD-F109, Service Manual

Page: 61 / 84

61
Pin
No IC Terminal name
Terminal name
I/O
Setting
Terminal function Remarks
49 P47/A7 DAC_MDI O DAC1796 MDI
50 P50/A8 DAC_MCK O DAC1796 MCK
P5x : Setting is possible by 1bit
unit
51 P51/A9 DXP_CS O Chip selector for DXP6000
52 P52/A10 DXP_RST O Reset for DXP6000
53 P53/A11 BU_CS O Chip selector for BU2630
54 P54/A12 MCK_SEL O MCLK selector
55 P55/A13 POWER O MainTRANS on / off
56 P56/A14 USBRST(DSP) O Reset for TMP92FD28FG
57 P57/A15 DECRST O Reset for TC94A92FG
"RESET in OR of
D305 and D306
RESET in +3.3V_D"
58 P60/A16 BUCK O TC94A92FG bus control (Schmitt Input)
59 P61/A17 (SRAMSTB) I Reserved
60 P62/A18 PWR_DET I
"""AC power OFF
detection input (When it is
unplugged AC : L)"""
61 P63/A19 DOUT_MUTE O Mute output of digital data
62 P64/A20 DOUT_SEL O Digital data output selection
63 P65/A21 SBSY I OASIS system busy input Connection with Borelo (4) pin.
64 P66/A22 INT0 O Reserved
65 P67/A23 /USB_BOOT I Reserved
66 P80/CS0/
TA1OUT[BOOT ]
/MCU_BOOT O BOOT (for farm writing) Only the output port
67 P81/CS1/TA3OUT DBUS_CONT2 O IC607 74VHC08(13) 4B Only the output port
68 P82/CS2 5V_REG_SW O Reserved Only the output port
69
P83/CS3/WAIT/
TA5OUT
DBUS_CONT1 O IC606 74VHC08(13) 4B
P6x: Setting is possible by 1
bit unit.
70 PD1/TB1IN0/INT5 DREQ (MP3) I OASIS DREQ input (Schmitt I input) only for input
71
PD2/TB1IN1/INT6/
TXD2
28TXD O
For TMP92FD28FG
communication
(Schmitt I input)
72 AM1 PULL UP (0Ω) I AM1 Pull UP Fixed H
73 X2 Oscillator connection pin O Oscillator connection pin
74 DVSS
"Power supply
(GND)"
P Power supply (GND)
75 X1 Oscillator connection pin I Oscillator connection pin
76 DVCC
"Power supply
(+3.3V)"
P Power supply (+3.3V)
77 RESET RESET I Reset input of μ-com
78 AM0 PULL UP (0Ω) I AM0 Pull UP Fixed H
79 P77/XT2 USB_PON O IC21 NCP380(3)EN Open drain output
80 P76/XT1 92CCE (DSP) O *TC94A92FG bus control
Open drain output
R644(OPEN);GND
81 DVCC
"Power supply
(+3.3V)"
P Power supply (+3.3V)
82 P70/RD
"CHECKIN (100KΩ/
PD)"
I P.W.B. check mode
Schmitt input and with
PU resistance
83 P71/SRWR
"CHECK1 (100KΩ/
PD)"
I P.W.B. check mode
Schmitt input and with
PU resistance
84 P72/SRLLB
"CHECK2 (100KΩ/
PD)"
I P.W.B. check mode
Schmitt input and with
PU resistance
85 P73/SRLUB
"CHECK3 (100KΩ/
PD)"
I P.W.B. check mode Schmitt input
86
P D 3 / T B 1 O U T 0 /
RXD2/ INT7
28RXD I
For TMP92FD28FG
communication
(Schmitt I input)
87
P D 4 / T B 1 O U T 1 /
SCLK2/ CTS2
OPEN O Non (Schmitt I input)