55
CXD2753R Terminal Function
Pin Name
I/O
Functions
1
VSC
-
It fixed to ground.( for Core)
2
XMSLAT
I
Latch input for
μ
COM serial communication.
3
MSCK
I
Shift clock input for
μ
COM serial communication.
4
MSDATI
I
Data input for
μ
COM serial communication.
5
VDC
-
+2.5V Power for Core.
6
MSDATO
O
Data output for
μ
COM serial communication. “Hi-Z” potential except the output mode.
7
MSREADY
O
Completion flag of output preparation for
μ
COM serial communication. “L” is outputted at the time of
completion.
8
XMSDOE
O
Output enable pin for
μ
COM serial communication. “L” is outputted at the time of MSDATO mode.
9
XRST
I
Reset pin. The whole IC is reset by at the time of “L” potential.
10
SMUTE
Ipd
Soft Mute. Soft mute of the audio output is carried out at the time of “H” potential.
It releases at the time of “L” potential.
11
MCKI
I
Master Clock input.
12
VSIO
-
It fixed to Ground. Ground for I/O.
13
EXCKO1
O
External output Clock 1.
14
EXCKO2
O
External output Clock 2.
15
LRCK
O
44.1kHz, 1Fs Clock output.
16
FRAME
O
Frame signal output.
17
VDIO
-
+3.3V Power for I/O.
18
MNT0
O
Monitor output.
19
MNT1
O
Monitor output.
20
MNT2
O
Monitor output.
21
MNT3
O
Monitor output.
22
TESTO
O
Output terminal for a Test. (open)
23
TESTO
O
Output terminal for a Test.(open)
24
TESTO
O
Output terminal for a Test.(open)
25
TESTO
O
Output terminal for a Test.(open)
26
TCK
I
Clock input for a Test. It fixed to “L” potential.
27
TDI
Ipu
Input pin(pull-up) for a Test.(open)
28
VSC
-
It fixed to Ground. Ground for CORE.
29
TDO
O
Output for a Test.(open).
30
TMS
Ipu
Input pin(pull-up) for a Test.(open)
31
TRST
Ipu
Reset pin(pull-up) for a Test. Input the Power-on reset signal or fixed to “L” potential.
32
TEST1
I
Test input pin. It fixed to “L” potential.
33
TEST2
I
Test input pin. It fixed to “L” potential.
34
TEST3
I
Test input pin. It fixed to “L” potential.
35
VDC
-
+2.5V Power for CORE.
36
TESTO
O
Out put for TEST. It fixed to open.
37
XBIT
O
DST monitor.
38
SUPDT0
O
Supplementary data output. (LSB)
39
SUPDT1
O
Supplementary data output.
40
SUPDT2
O
Supplementary data output.
41
SUPDT3
O
Supplementary data output.
42
VSIO
-
Ground for I/O.
43
SUPDT4
O
Supplementary data output.
44
SUPDT5
O
Supplementary data output.
45
VDIO
-
+3.3V Power for I/O.
46
SUPDT6
O
Supplementary data output.
47
SUPDT7
O
Supplementary data output. (MSB)
48
XSUPAK
O
Supplementary data Acknowledge output terminal.
49
VSC
-
Ground for CORE.
Summary of Contents for DCD-A100
Page 5: ...5 DIMENSION...
Page 22: ...22 14 Click the Exit 15 Turn off DCD A100 16 Remove the SPK 581 form DCD A100...
Page 24: ...24 4 Click the Setup in the menu bar and select the Setup File 5 Click Device tab...
Page 26: ...26 8 Choose the Device is Blank And Click OK 9 Click Object File tab...
Page 28: ...28 12 The place of the file is displayed...
Page 29: ...29 13 Click Option 14 Choose Erase Without Password for 900 Family And Click OK...
Page 32: ...32 TROUBLE SHOOTING 8U 210083 1 DIGITAL POWER UNIT...
Page 33: ...33 8U 310040 SACD MODULE UNIT FE BE BLOCK...
Page 34: ...34...
Page 35: ...35 8U 310040 SACD MODULE UNIT DIGITAL BLOCK...
Page 36: ...36...
Page 37: ...37 8U 21003 7 AUDIO UNIT...
Page 38: ...38 8U 310040 SACD MODULE UNIT USB BLOCK...
Page 39: ...39...
Page 40: ...40 8U 210084 DSP DIGITAL I O UNIT...
Page 41: ...41...
Page 42: ...42...
Page 43: ...43 BLOCK DIAGRAM STAND BY TRANS ANALOG TRANS DIGITAL TRANS...
Page 44: ...44 MEMO...
Page 54: ...54 CXD2753R 310040 IC303 Pin Assignment Block Diagram...
Page 62: ...62 TMP92FD28AFG 310040 IC803...
Page 66: ...66 TC94A92FG 310040 IC802...
Page 71: ...71 BD7956FS 310040 IC101 Block Diagram 1 27 54 28...
Page 75: ...75 AK4399EQ 210083 IC106 Block Diagram...
Page 76: ...76...
Page 77: ...77...
Page 81: ...81 8U 210084 DSP DIGITAL IO UNIT COMPONENT SIDE FOIL SIDE...
Page 98: ...98 98 MEMO...
Page 99: ...99 WIRING DIAGRAM...
Page 104: ...104 MEMO...
Page 106: ...106 POINTS OF GREASING Rib...
Page 112: ...112 D E 3 2 6 5 Ditail E 29 30 31 32 Ditail D...
Page 126: ...8 7 6 5 4 3 2 1 A B C D E F SCHEMATIC DIAGRAMS 8 9 8U 210083 3 ANALOG POWER UNIT...