Denon D-T1, Service Manual

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SP8104-WWX(Suplus) (U5 : DSP)
Pin function
Pin Symbol I/O Description Pin Symbol I/O Description
1 GPIO I/O GPIO Video DAC Interface
2 VFD_CLK/GPIO I/O 1. GPIO / 2. CLK of VFD interface 67 V_COMP A Video DAC Bias Voltage
3 VFD_STB/GPIO I/O 1. GPIO / 2. Strobe of VFD interface 68 V_FSADJ A Full-Scale adjust control pin (EXT
resistor) (1.2 K ohm to ground)
4 VFD_DATA/GPIO I/O 1. GPIO / 2. DATA of VFD interface 69 TV_DAC0 A Video DAC channel 0 output
5 VDD_33 P I/O power supply 70 TV_AVDD P 3.3V power for Video DAC channel 0
6 RESET_B I System Reset 71 TV_AVSS G Ground pin for Video DAC channel 0
7 VSS_0 G Ground 72 TV_AVDD P 3.3V power for Video DAC channel
1~3
8 IR_IN/GPIO I/O 1. IR input / 2. GPIO" 73 TV_DAC1 A Video DAC channel 1 output
9 GPIO I/O GPIO 74 TV_DAC2 A Video DAC channel 2 output
10 GPIO I/O GPIO 75 TV_DAC3 A Video DAC channel 3 output
11 VDD125 P Kernel logic power supply 76 TV_AVSS G Ground pin for Video DAC channel
1~3
12 HSYNC/GPIO I/O 1. GPIO / 2. HSYNC : HSYNC signal of
TV Interface
Kernel Power of Top
Side
13 VSYNC/GPIO I/O 1. GPIO / 2. VSYNC_PC : VSYNC signal
of TV Interface
77 VDD125 P Kernel logic power supply
SDRAM Interface USB Interface
14 M_D0 I/O SDRAM data bus bit 0 78 USB_AVDD P 3.3V power for USB PLL & USB trans-
ceiver
15 M_D1 I/O SDRAM data bus bit 1 79 USB_DP A USB bus D+
16 M_D2 I/O SDRAM data bus bit 2 80 USB_DM A USB bus D-
17 M_D3 I/O SDRAM data bus bit 3 81 USB_AVSS G Ground pin for USB PLL & USB trans-
ceiver
18 M_D4 I/O SDRAM data bus bit 4 PLL Interface
19 M_D5 I/O SDRAM data bus bit 5 82 PLL_VSS G Ground pin for PLL
20 M_D6 I/O SDRAM data bus bit 6 83 NC NC Unused pin
21 M_D7 I/O SDRAM data bus bit 7 84 CLKIN I Crystal PAD input
22 M_D15 I/O SDRAM data bus bit 15 85 CLKOUT O Crystal PAD output
23 M_D14 I/O SDRAM data bus bit 14 86 VDD125 P 1.2V power for PLL
24 M_D13 I/O SDRAM data bus bit 13 Servo Interface
25 M_D12 I/O SDRAM data bus bit 12 87 HOME/GPIO I/O 1. GPIO / 2. Servo Test GPIO PIN 0
26 M_D11 I/O SDRAM data bus bit 11 88 LDSW/GPIO I/O 1. Servo Test GPIO PIN 1 / 2. GPIO
27 M_D10 I/O SDRAM data bus bit 10 89 AD_AVSS G Servo ADC ground pin
Pin Symbol I/O Description Pin Symbol I/O Description
28 M_D9 I/O SDRAM data bus bit 9 90 AD_AVDD P 3.3V power for Servo ADC
29 M_D8 I/O SDRAM data bus bit 8 91 AGCCAP A External AGC capacitor connected to
ground. (0.1u)
30 M_DQM1 I/O SDRAM data input/output mask for
M DD[15:8]
92 RFIS I Single-ended RF equalizer input.
31 VSS G Ground 93 RFSUM I SUM of RF input A, B, C, D
32 M_CLK O SDRAM CLK 94 D I CD RF input D, from the main beam
photo detector
33 VDD_33 P I/O power supply 95 C I CD RF input C, from the main beam
photo detector
34 M_A11 I/O SDRAM address bus 11 96 B I CD RF input B, from the main beam
photo detector
35 M_A9 I/O SDRAM address bus 9 97 A I CD RF input A, from the main beam
photo detector
36 M_A8 I/O SDRAM address bus 8 98 F I CD tracking error input F, from the
sub-beam photo detector
37 M_A7 I/O SDRAM address bus 7 99 E I CD tracking error input E, from the
sub-beam photo detector
38 M_A6 I/O SDRAM address bus 6 100 OPVIP I Op-amp 1 positive input
39 M_A5 I/O SDRAM address bus 5 101 OPVIN I Op-amp 1 negative input
40 M_A4 I/O SDRAM address bus 4 102 RF_APC_AVSS G Ground pin for RF & APC
41 M_DQM0 I/O SDRAM data input/output mask for
M DD[7:0]
103 NC NC Unused pin
42 M_WE I/O SDRAM write enable / row pre-
charge
104 CDLDO O CD APC output
43 M_CAS I/O SDRAM column address strobe 105 NC NC Unused pin
44 M_RAS I/O SDRAM row address strobe/pre-
charge
106 CDMDI I CD APC input from monitor photo
diode
45 M_BA0 I/O SDRAM bank select address 0 107 SRV_AVDD P 3.3V power for SERVO
46 M_BA1 I/O SDRAM bank select address 1 108 V_REF21 A Reference DC bias voltage
47 M_A10 I/O SDRAM address bus 10 109 V_REF165 A Reference DC bias voltage
48 M_A0 I/O SDRAM address bus 0 110 DA_AVSS G Ground pin for DAC
49 M_A1 I/O SDRAM address bus 1 111 DATEO A 4-bit DAC output for motor drive TE
50 M_A2 I/O SDRAM address bus 2 112 DAFEO A 4-bit DAC output for motor drive FE
51 M_A3 I/O SDRAM address bus 3 113 DA_AVDD P 3.3V power for DAC
Audio SPDIF Output
Interface
114 SPDC_OUT I/O Servo SPDC OUT
52 GPIO/SPDIF_OUT I/O 1. GPIO / 2. Audio SPDIF Output 115 SC_OUT I/O Servo SC_OUT
53 GPIO/SPDIF_IN I/O 1. GPIO / 2. Audio SPDIF Input 116 GPIO I/O GPIO
54 GPIO I/O GPIO 117 DMEA I/O Servo DMEA
55 GPIO I/O GPIO 118 CARD_SENSE/GPIO I/O 1. GPIO / 2. Card Sense pin
56 GPIO I/O GPIO 119 SD_D0/GPIO I/O 1. GPIO / 2. SD Data bit 0
57 GPIO I/O 1.GPIO / 2. UART_TX3 120 SD_CLK/GPIO I/O 1. GPIO / 2. SD clock pin
58 GPIO I/O 1.GPIO / 2.UART_RX3 121 SD_CMD/GPIO I/O 1. GPIO / 2. SD comm & pin
Audio Codec Inter-
face
122 GPIO I/O 1. GPIO
59 ADC_AVSS G Audio ADC ground 123 GPIO I/O 1. GPIO
60 ADC_AVDD P Audio ADC power 124 CDVR I/O Servo CDVR
61 AIN_R A Audio ADC analog input 125 SPI_CE O Chip enable of SPI interface
62 VREF A Reference voltage for Audio Codec 126 SPI_D0 I/O Data bit 0 of SPI Interface
63 ADAC_ AVDD P Audio DAC power 127 SPI_CLK O CLK output of SPI Interface
64 ADAC_ AVSS G Audio DAC ground 128 SPI_D1 I/O Data bit 1of SPI Interface
65 AOUT_L A DAC Front Left channel analog
output
66 AOUT_R A DAC Front Right channel analog
output
Note: Please refer to SPHE8104W servo datasheet for servo related information.
Before Servicing
This Unit
Electrical
Mechanical
Repair Information
Updating
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