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A3V56S30FTP-G6 Block Diagram
A3V56S30FTP
A3V56S40FTP
256M Single Data Rate Synchronous DRAM
Revision 1.1 Mar., 2010
Page 3 / 39
Note:This figure shows the A3V56S30FTP
The A3V56S40FTP configuration is 8192x512x16 of cell array and DQ0-15
Type Designation Code
A 3V
56
S40F TP-
G6
Speed Grade
75
:
133MHz@CL=3
7
:
143MHz@CL=3
6
:
166MHz@CL=3
G
:
Green
Package Type TP
:
TSOP (II)
Process
Generation
Function
Reserved
for
Future
Use
Organization
2
n
3
:
x8, 4
:
x16
SDR
Synchronous
DRAM
Density
56
:
256M bits
Interface
V
:
LVTTL
Memory
Style
(DRAM)
Zentel
DRAM
Summary of Contents for AVR-2113CI
Page 9: ...9 434 0 152 5 167 0 54 0 164 5 18 5 288 0 22 5 329 0 344 0 AVR 2113CIE3 2113E2 E1C models ...
Page 48: ...Personal notes Personal notes 48 ...
Page 104: ...104 LEVEL DIAGRAM LEVEL DIAGRAM FRONT ch Ω ...
Page 105: ...105 LEVEL DIAGRAM CENTER ch Ω ...
Page 106: ...106 LEVEL DIAGRAM SUBWOOFER ch ...
Page 107: ...107 LEVEL DIAGRAM SURROUND ch Ω ...
Page 108: ...108 LEVEL DIAGRAM SURR BACK ch Ω ...
Page 173: ...173 AK5358BET HDMI U2403 AK5358BET Pin Function ...
Page 186: ...186 NJM2586AM VIDEO IC5002 ...
Page 187: ...187 2 FL DISPLAY FLD 018BT021GINK FRONT FL4400 PIN CONNECTION q T7 ...
Page 188: ...188 GRID ASSIGNMENT ...
Page 189: ...189 ANODE CONNECTION ...