Denon AirPlay AVR-3311CI, Service Manual

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154
R5F64169DFD Terminal Functions
Pin Pin Name Synbol I/O Type Pullup
Lv
Cnv STBY stop
Function
1 P96/(TXD4) SIRIUS RST O C - 3/5 O/L O/L NC
2 P95/(CLK4) HD RADIO RST/ST IND O/O/I C/C/- - - O/L O/L HD RADIO control pin /ANALOG TUNER control
3 P94/(CTS4)/TB4IN NC O/I C/- - - O/L O/L NC
4 P93/(CTS3)/TB3IN NC O/I C/- - - O/L O/L NC
5 P92/TXD3/SDA3 HDRADIO MOHI/TU SDA O/I_O C - - O/L O/L HD RADIO control/ANALOG TUNER control
6 P91/RXD3/SCL3 HDRADIO MIHO/TU SCL I/O -/C - - O/L O/L HD RADIO control/ANALOG TUNER control
7 P90/(CLK3) E POWER O C - - O/L O/L ETHERNET POWER control pin
8 P146/INT8 POWER KEY I - 3VPu - I I POWER KEY (WAIT MODE cancel, interrupt port)
9 P145/INT7 REQ SOMI I - - - I O/L MAIN-SUB u-com communication control output pin
10 P144/INT6 RDS CLK(3311E2 model) I - - 3/5 I I RDS control(3311E2 model)(Interrupt detection)
11 P143 CPU POWER O C - - O/L O/L MAIN CPU POWER control pin (POWER ON: H)
(ETHER=ON or CEC ON = STANDBY: H)
12 VDC0 VDC0 - - - - - - Smoothing capacitor connection pin
13 P141 IN ONLY DOSD MIFO_BUSY I - - - I O/L D.OSD CPU control pin
14 VDC1 VDC1 - - - - - - Smoothing capacitor connection pin
15 NSD NSD - - M3VPu - - - Emulator communication pin
16 CNVss CNVSS - - Pd - - - Single-chip / Micro-processor mode switching (Normal single-
chip : L, Rewrite boot program start : H input set)
17 P87/(XCIN) E RESET O C - - O/L O/L ETHERNET RESET control pin
18 P86/(XCOUT) 232C POWER(REMOTE PWR) O C - - O/L O/L 232C POWER control pin(ON: H)/
19 RESET RESET - - M3VPu - - - Reset input (reset: L)
20 XOUT X2 - - - - - - Clock output
21 VSS VSS - - - - - - GND
22 XIN X1 - - - - - - Clock input
23 VCC VCC1 - - - - - - +3V
24 P85/(NMI) IN ONLY iPod DET I - SW3 - O/L O/L MINI JACK connection detection pin for DOCK
connection(Connection:H)
25 P84/INT2 PLDAERR I - - O/L O/L PLD ERROR detection
26 P83/INT1 B.DOWN I - - - I I Power failure detect(Power failure:L)
27 P82/INT0 REMOCON I - 3VIn/Pd - I I Remote control signal input
28 P81 D5V POWER O C - - O/L O/L Digital 5V power control pin
29 P80/RXD5 iPod RXD I - (3Vin)/ 5/3 O/L O/L iPod communication control pin
30 P77/(CLK5) EXP & FL DATA O C - - O/L O/L EXP control pin & FL control pin
31 P76/TXD5 iPod TXD O C - 3/5 O/L O/L iPod communication control pin
32 P75/RXD8 NC I - (3Vin) 5/3 O/L O/L NC
33 P74/(CLK8)/
TA2OUT
NC O C - - O/L O/L NC
34 P73/TXD8 SIRIUS MO(3311E3 model) O/I C/N - 3/5 O/L O/L SIRIUS control pin (3311E3 model)
35 P72/CLK2 DOSD CPU CLK O C - - O/L O/L D.OSD CPU control pin
36 P71/RXD2 DOSD CPU RX I - - - O/L O/L D.OSD CPU control pin
37 P70/TXD2 DOSD CPU TX O C - - O/L O/L D.OSD CPU control pin
38 P67/TXD1 TXD MO232I O C - O/L O/L Data transfer to external pin(AMX)/MITSUBISHI writer rewrite
39 VCC VCC1 - - - - - - +3V
40 P66/RXD1 RXD MI232O I - - - I O/L Data received from the external pin(AMX)
/MITSUBISHI writer rewrite
41 VSS VSS - - - - - - GND
42 P65/(CLK1)/
SCLK(L)
EXP & FL CLK O C Pd - O/L O/L EXP control pin & FL control pin
43 P64/(BUSY) FL CE1 O C - - O/L O/L FL control order pin
44 P63/TXD0 E_TXDMOEI O C - - O/L O/L ETHERNET communication control pin
45 P62/RXD0 E_RXDMIEO I - - - I O/L ETHERNET communication control pin
46 P61/(CLK0) FL RST O C - - O/L O/L FL control pin
47 P60/(CTS0) DOSD WRITE O C - - O/L O/L D. OSD rewrite control pin
48 P137 ACK SIMO O C - - O/L O/L MAIN-SUB u-com communication control output pin
49 P136/ISCLK2 CLK MO O C - - O/L O/L MAIN-SUB u-com communication control output pin
50 P135/ISRXD2 SOMI I - - - I O/L MAIN-SUB u-com communication control output pin
51 P134/ISTXD2 MOSI O C - - O/L O/L MAIN-SUB u-com communication control output pin
52 P57/RDY RDY I C M3VPu - I I External memory access pin(NC,Pup)
53 P56/ALE ALE O C - - O/L O/L External memory access pin(NC)
54 P55/HOLD/EPM HOLD/FRASH EPM I C M3VPu - I I External memory access pin(NC,Pup)
/Rewrite boot program start : L input set
55 P54/HLDA HLDA O C - - O/L O/L External memory access pin(NC)
56 P133 ROM POWER O C - - O/L O/L 3.3V control pin for enhancing ROM
57 VSS VSS - - - - - - GND
58 P132 D.OSD MOFI_BUSY O C - - O/L O/L D.OSD CPU control pin