Table 7. Memory population rules (continued)
Processor
Configuration
Memory population
Memory population
information
Dual processor (Start
with processor1. Processor
1 and processor 2
population should match)
Optimizer (Independent
channel) population order
A{1}, B{1}, A{2}, B{2}, A{3}, B{3},
A{4}, B{4}, A{5}, B{5}, A{6},
B{6}, A{7}, B{7} A{8}, B{8}
Odd amount of DIMMs per
processor allowed.
NOTE:
Odd number
of DIMMs will result
in unbalanced memory
configurations, which
in turn will result in
performance loss. It
is recommended to
populate all memory
channels identically
with identical electrical
specification DIMMs
for best performance.
Optimizer population order
is not traditional for 8 and
16 DIMMs installations for
dual processor.
￭
For 8 DIMMs: A{6},
A{5}, A{2}, A{1}, A{8},
A{7}, A{4}, A{3}
￭
For 16 DIMMs: A{6},
B{6} A{5}, B{5} A{2},
B{2} A{1}, B{1}, A{8},
B{8}, A{7}, B{7}, A{4},
B{4} A{3}, B{3}
●
Populate all the sockets with white release tabs first, followed by the black release tabs.
●
In a dual-processor configuration, the memory configuration for each processor must be identical. For example, if you
populate socket A1 for processor 1, then populate socket B1 for processor 2, and so on.
●
Unbalanced or odd memory configuration results in a performance loss and system may not identify the memory modules
being installed, so always populate memory channels identically with equal DIMMs for best performance.
●
Minimum recommended configuration is to populate four equal memory modules per processor. AMD recommends limiting
processors in that system to 32 cores or less.
●
Populate eight equal memory modules per processor (one DIMM per channel) at a time to maximize performance.
NOTE:
Equal memory modules refer to DIMMs with identical electrical specification and capacity that may be from
different vendors.
Memory interleaving with Non-uniform memory access (NUMA)
Non-uniform memory access (NUMA) is a memory design used in multi-processing, where the memory access time depends on
the memory location relative to the processor. In NUMA, a processor can access its own local memory faster than the non-local
memory.
NUMA nodes per socket (NPS) is a new feature added that allows you to configure the memory NUMA domains per socket.
The configuration can consist of one whole domain (NPS1), two domains (NPS2), or four domains (NPS4). In the case of a
two-socket platform, an additional NPS profile is available to have whole system memory to be mapped as single NUMA domain
(NPS0). For more information on the memory interleaving for NPSx, see the Memory interleaving population rules section in this
topic.
BIOS implementation for NPSx
●
The BIOS Setup menu presents the applicable NPSx options based on the underlying model number. A change to the current
NPSx is communicated to pre-BIOS firmware to take effect on the next boot. The default NPS setting is 1.
●
During boot, if the selected NPSx option is not allowed for the model number (for example, if the processor model number
changes between reboot), system will halt at the end of POST with UEFI0388 message displayed. On the next reboot, the
system will fall back to NPS1 default setting.
●
During boot, if the preferred interleaving for the current NPSx is not possible due to memory configuration (for example, the
memory population is inconsistent with the preferred interleaving), BIOS shows a warning message UEFI0391.
24
Installing and removing system components
