DW1000 User Manual
© Decawave Ltd 2017
Version 2.12
Page 35 of 242
RXSFDTO (SFD timeout). For details on how to apply a receiver-only reset see SOFTRESET field of
Register 0x36:00 – PMSC_CTRL0.
4.2 Delayed Receive
In Delayed receive operation the receiver turn-on time is programmed into
Time and then the delayed receiving is initiated by setting both RXDLYE and RXENAB controls
Register file: 0x0D – System Control
The DW1000 remains in idle state until the system time (
Register file: 0x06 – System Time
Counter) reaches
the value programmed in
Register file: 0x0A – Delayed Send or Receive
Time and then the IC receiver is
turned on. This point marks the start time for any programmed timeouts that apply to the reception
process, i.e. the preamble detection timeout (which is set and enabled by
) and the frame wait timeout (which is enabled by the RXWTOE configuration bit in
Configuration, and whose period is programmed in
Register file: 0x0C – Receive Frame Wait
The benefit of delayed receive is that the receiver can be turned on at just the right moment to receive an
expected response, especially when that response is coming from a DW1000 employing delayed transmit to
send the response message at a precise time. This saves power because the idle mode power counting
down to the RX enable time is significantly less than the power required during frame reception.
One use of delayed receive, and especially delayed transmission, is in symmetric double-sided two-way
ranging, (described in
), where it is important to keep the response times the
same at both ends to reduce the error in range estimate. Minimising the response time also reduces this
error, and here it is possible for the host microprocessor to be late invoking the delayed TX or RX, so that the
system clock is beyond the specified start time and then the IC has to complete almost a whole clock count
period before the specified start time is reached. The HPDWARN event status flag in
Register warns of this “lateness” condition so that during development a delay may be
chosen large enough to generally avoid this lateness. The HPDWARN status flag also serves to facilitate
detection of this late invocation condition so that recovery measures may be taken should it ever occur in
deployed product.
4.3 Double Receive Buffer
This DW1000 has a pair of receive buffers offering the capability to receive into one of the pair while the
host system is reading previously received data from the other buffer of the pair. This is useful in a TDOA
RTLS anchor node where it is desired to have the receiver on as much as possible to avoid missing any tag
blink messages. A number of ancillary registers (timestamps, quality indicators and status bits) are also
doubly-buffered. The registers that are part of this “RX double-buffered swinging-set” are listed in Table 7.
Note: If overruns occur (see section 4.3.5), received frame data will be corrupted. Double buffering must
not be used in systems where overruns may be likely or frequent and is best used in systems where host
processing of the received frames is such that overruns will never occur.
