H A R D W A R E O P E R A T I O N
Data Device Corporation
BU-65570/2i Manual
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(approximately 2K words). This allows for either real-time analysis or
mass collection/storage of monitored data.
OTHER FEATURES
Variable Amplitude Transceiver
The BU-65572iX provides variable amplitude transceivers for each 1553
channel installed on the card. The output of the variable transceiver is
software controllable in the range of 0.0 volts to 28.0 volts. This range is
covered in 4096 steps. The user application is able to modify this
amplitude in real by calling the ‘ddcSetAmp’ (see BU-69068 manual)
library function.
The transceiver outputs can be individually controlled for each of the
installed channels, while the two transceivers for a given channel will be
varied simultaneously. Functions for controlling the transceiver outputs
are available in the ‘C’ library that is provided with the card.
IRIG-B support
Inter-Range Instrument Group (IRIG) Standard 200-95 recognition is
supported by the BU-65572iX boards. The implementation of this
standard into the 1553 tester/simulator board enables all messages to
be tagged with time-of-day information, allowing accurate correlation
between messaging on the 1553 bus and other hardware and software
events that are occurring in the system. This is especially useful when
trying to identify the cause of a system problem that may be directly
related to message data sent over the 1553 bus. The IRIG-B timestamp
for each of the installed channels may be individually selected. This
allows one channel to use the internal 32 bit Time-Tag clock, while
another channel will stamp the messages with the IRIG-B time. The
IRIG-B timestamp, if enabled, will be combined with the internal
timestamp to provide µs accuracy.
When IRIG is enabled on the card, the monitor message header will
contain two more words than in the previous versions. These two words,
which are tacked onto the end of the header, specify the IRIG high and
IRIG low words of the timestamp. A feature of adding new entries to the
header is the ability to maintain the existing 32-bit internal time tag of the
BU-65572iX. When this feature is operating, the internal 32-bit time tag
is reset to zero each time a new IRIG signal is received (about once per
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