1
bit #
INT #
SOURCE OF INTERRUPT
0
0
External event input has occurred
1
•.
1
Periodic pulse output has occurred
2
2
Time coincidence strobe has occurred
3
3
The one pulse per second (1PPS) output has occurred
4
4
A data packet is available in the output
FIFO
5-15
reserved
OFFSET 0x28 M A S K
RESET VALUE OxXX00
An interrupt source is enabled by writing a'1' to the mask bit corresponding to that source. A n '
interrupt source is disabled by writing a '0' to the mask bit corresponding to that source.
OFFSET Ox2A I N T S T A T
RESET VALUE OxXX00
The
INTSTAT
register has the same basic structure as the
MASK
register. T h e TFP sets bits 0
through 4 of this register depending upon which of the interrupt source generated the interrupt. The
INTSTAT
register bits are set regardless of the state of the mask bits. This feature allows the host
to poll for the occurrence of the interrupt sources.
INTSTAT
bits are cleared by writing to the
INTSTAT
register with the correspond bit(s) set.
*** WARNING ***
It is the transition of an
INTSTAT
bit from a zero to a one that causes an interrupt to be generated
(assuming, o f course, that the corresponding
MASK
bit was set). I f the bit in the
INTSTAT
register is not cleared by the host it is not possible to generate a second interrupt. I t is good
programming practice to clear the
INTSTAT
register immediately after interrupts have been
enabled.
OFFSET Ox2C V E C T O R
R
E
S
E
T
VALUE 0x/30(00
The
VECTOR
register holds the 8 bit Status / ID byte that the TFP will return during interrupt
acknowledge cycles for VMEbus applications.
Datum Inc., Bancomm Div.
bc635VME/bc350VXI Manual
3
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7
