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USB3-FRM13_K Users Manual (Rev 1.0) 

 

 

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2.2    Camera Link   

Camera Link is a communication interface for use in a vision application development. In the 

past, the camera manufacturer and Frame Grabber manufacturers use their own standard 

connectors and cables. This has caused a lot of confusion and increased costs to users. In order to 

eliminate this confusion and increase the data rate and data transmission trouble, the specifications 

of Camera Link interface have been made to the regulations of cable or connector assembly 

specifications, transfer speed, transfer method at the meeting of camera makers and Frame grabber 

manufacturers. 

 

Currently, many digital video solution use the LVDS (Low Voltage Differential Signal) 

communication as defined RS-644. LVDS is a way to improve the existing RS-422 that had 

intractable cable and transmission speed limit. RS-644 LVDS was the Camera Link standard. The 

LVDS can be transferred the data at high speed using low voltage swing differential signal 

Differential Signal. This is compared with the existing single-ended signal (Single-ended Signal) 

using one of the lines, the differential signal transmits the signal using two complementary lines. 

Such a transfer is characterized by excellent noise immunity, low power consumption, large in-

phase voltage transmission to refer only to the data transfer on the ground, however Single-ended 

system is impossible.   

 

Camera Link has multiple configuration with depending on the amount of data to be transferred. 

Base Configuration consists of 28 bits, including a 24-bit pixel data and 3-bit video sync signal 

lines of the Data Valid, Frame Line Valid, Line Valid, one reserved signal line, and can transmit 

2.04Gbit / s (256MB / s). Medium Configuration can be transmitted the 48bit video signal to 

4.08Gbit/s(510Mb/s), Full Configuration can be transmitted the 64bit video signal to 

5.44Gbit/s(680MB/s). In particular, the Deca configuration allows 6.8 Gbit /s. It can transfer at 

(850MB/s). Camera Link requires two cables to transfer more than Medium Specifications. 

 

Transmitter part is converted to LVDS data stem’s 4/8/12 from 28/48/64 bit CMOS / TTL data 

only. Converted signal is transmitted to MDR Cable in accordance with the Transmit Clock signal, 

the opposite Receiver will be converted into parallel LVDS data of 28/48/64 bits of CMOS / TTL 

according to the Receive Clock signal from 4/8/12 LVDS data. This Channel Link technology can 

immediately take advantage of the low cost chip-set because easy to learn and easy to transplant.   

 

Camera Link Interface includes Base Configuration, Medium Configuration, Full Configuration. 

Base Configuration is used 4 RS-644 LVDS pairs for controlling the Transmitter/Receiver and 

Camera like Figure 2-2, is used for communication between the camera and the frame grabber. 

Transferred the data from serial 26-Pin MDR Cable, is used to change 28-bit parallel image data at 

Summary of Contents for SB3-FRM13 K Series

Page 1: ...AQ system is believed to be accurate and reliable However no responsibility is assumed by DAQ system for its use nor for any infringements of patents or other rights of third parties which may result...

Page 2: ..._K Layout 3 2 Functional Blocks 3 3 Connector Pin out 3 3 1 CN1 Connecter 3 3 3 J1 MDR26 Connecter 3 3 4 J2 MDR26 Connecter 3 3 5 J3 Connecter 3 3 6 J8 Connecter 3 3 2 SW1 Switch 4 Installation 4 1 Pa...

Page 3: ...ription of this sample program Mini MDR 26 pin connector connects to Camera Link compatible camera The bottom connector J8 connects to Base Camera Link Configuration The upper connector J4 connects to...

Page 4: ...85MHz Supports 1 10tap 85Mhz Power by USB B type connecter or Single 5V operation Fully Plug and Play UART Data8 bit 1 start 1 stop No parity 600 19200 38400 57600 115200bps Rx Tx External Device Inte...

Page 5: ...are writing to the DDR 1 DDR 2 memory after receiving the frame data from two Mini MDR 26 and sent to PC by the request These functions are performed by using API through USB 3 0 Interface at the PC F...

Page 6: ...ata transfer on the ground however Single ended system is impossible Camera Link has multiple configuration with depending on the amount of data to be transferred Base Configuration consists of 28 bit...

Page 7: ...USB3 FRM13_K Users Manual Rev 1 0 7 http www daqsystem com the Receiver part of Frame Grabber Figure 2 2 Base Camera Link Block Diagram...

Page 8: ...USB3 FRM13_K Users Manual Rev 1 0 8 http www daqsystem com Figure 2 3 Full Camera Link Block Diagram...

Page 9: ...ure 2 4 Camera Link cable is typically used 26 Pin Mini MDR Connecter is located at the end of the cable as like Figure 2 5 Figure 2 6 is 26 Pin Mini MDR Connecter placed at the Camera or Frame Grabbe...

Page 10: ...to use the MDR Medium Full Configuration is used other cable and has a total 64bit wide video path Deca Configuration has 80bit wide video path The transmitted signal is parallelized to 64 bit parall...

Page 11: ...transfer cable to the camera Figure 2 9 shows the connection with theUSB3 FRM13_K and the camera a Base Configuration PoCL Connection b Full Configuration PoCL Connection Camera Link Signals Power Ot...

Page 12: ...s table 1 and 1 and 26pins are used as the power 12V It can supply current of 330mA for 12V it can supply current of 400mA for 10V as standard on 4W watt For USB3 FRM13_K PoCL function can be implemen...

Page 13: ...ce between the two in the case of of safe power is to add some of the sensor circuit in order to detect the possible PoCL camera it does not detect the camera and cable there is no power supply Dedica...

Page 14: ...GER_IN FVAL LVAL Camera Output Input Image Frame 0 Frame 1 Frame 2 Frame 3 Frame 4 Frame 1 Frame 2 Frame 4 t Start Frame When FVAL valid Detect Level Figure 2 13 Level Mode Timing EDGE Mode When the T...

Page 15: ...B3 FRM13_K Layout The board has 6 LEDs to indicate the operation status D1 turns on when power is applied to the board and the initialization ends up D2 turns on when Horizontal synchronization signal...

Page 16: ...rface of high voltage higher than 3 3V CMOS Logic is exchanged to normal 3 3V Logic Level 3 FPGA U6 All of the functions are controlled by the logic program of the FPGA 4 Regulator U14 U20 U21 The Reg...

Page 17: ...scription USB B type Connector 1 2 3 4 10 11 5 6 7 8 9 Figure 3 2 CN1 Connecter USB3 0 standard powered B type Front View Table 3 USB3 0 Standard Powered B Connecter Pin Signal Name Description Remark...

Page 18: ...Camera link standard so please refer to the Camera link standard document for more description and information 3 10 9 8 7 6 1 2 5 4 19 18 17 16 15 14 13 12 11 24 23 22 21 20 PoCL 12V Inner shield 26...

Page 19: ...X2 Camera link LVDS receive data2 11 X1 Camera link LVDS receive data1 12 X0 Camera link LVDS receive data0 13 Inner Shield 14 Inner Shield 15 CC4 Camera Control output 4 16 CC3 Camera Control output...

Page 20: ...he Camera link standard so please refer to the Camera link standard document for more description and information 3 10 9 8 7 6 1 2 5 4 19 18 17 16 15 14 13 12 11 24 23 22 21 20 Inner shield Inner shie...

Page 21: ...ock 10 Y2 Camera link LVDS receive data6 11 Y1 Camera link LVDS receive data5 12 Y0 Camera link LVDS receive data4 13 Inner Shield 14 Inner Shield 15 Z3 Camera link LVDS receive data11 16 ZCLK Camera...

Page 22: ...der A Positive Phase 4 EA Encoder A Negative Phase 5 EB Encoder B Positive Phase 6 EB Encoder B Negative Phase 7 EZ Encoder Z Positive Phase 8 EZ Encoder Z Negative Phase 9 REV Direction Positive Sign...

Page 23: ...er is insufficient it will use this connector 12V 1 0A Figure 3 6 Rated Output 3 3 2 SW1 Switch The USB3 FRM13_K_B board is designed of four maximum USB3 FRM13_K_B boards at the same time so as usable...

Page 24: ...lation Sequence To install USB3 FRM13_K board in your environment do the following steps The USB3 FRM13_K board is completely Hot Plug and Plug Play Therefore you can install it easily The required PC...

Page 25: ...B3 FRM13_K board turns on 4 Connect USB3 A B cable between the case and your PC The Add New Hardware Wizard will appear in order to install the driver for new hardware 5 The Add new Hardware Wizard wi...

Page 26: ...Select Search for the best driver in these locations Check Search removable media floppy CD ROM Check include this location in the search Click Browse button Select the folder where the drivers are lo...

Page 27: ...tp www daqsystem com Figure 4 4 Warning window When you across a window s warning message regarding to the compatibility problem as shown the Figure 4 4 during the installation process just click Cont...

Page 28: ...RM13_K Users Manual Rev 1 0 28 http www daqsystem com If the installation is completely finished a completion window message shall be shown as in Figure 4 5 Click Finish Figure 4 5 Completion message...

Page 29: ...you can find the item DAQ system USB3 0 Frame 13 Device in the Device Manager window as shown in Figure 4 6 Figure 4 6 Device Manager window If you can see the DAQ system USB3 0 Frame 13 Device at the...

Page 30: ...hen Sample program FrmTest exe is executed Above executable files are a screen test board using its DVI CL1 DVI to Camera Link board the Camera Link camera connection is different To run the sample ap...

Page 31: ...ress this button to initialize the function of receiving image frame data It is performed only once after power is applied to the board 4 Mode Selection It selects a Video Data Mode of 8bit 16bit 32bi...

Page 32: ...Hex Value If image frame data is not saved on the board you must wait until the end of data collection 10 Auto toggle When check this box it displays a video 11 Skip toggle When press this button it...

Page 33: ...ox don t click you use the HSYNC Horizontal Synchronization signal 18 inv HS toggle If the box clicks you use the inverse HSYNC signal If the box doesn t click you use the HSYNC signal 5 2 Multi board...

Page 34: ...initialized to 0 Suce Success It shows good image transfer state Fail It shows bad image transfer state OE Overflow Error UE UnRead Error SE Size Error Size 5 4 I2C Read Write Functions 1 Init button...

Page 35: ...Scan Camera 1 Line Scan Camera toggle If the box clicks you can use a Line Scan Camera Otherwise you can use an Area Scan Camera 2 Page Start button You can select Continuous Page Trig Z Phase modes...

Page 36: ...e clock 6 Configure Trigger button Trigger 1 CC1 Trigger 2 CC2 of the following conditions is set depending on the selected trigger Delay Width Blank Delay 0 4095 Width Blank 0 65535 Minimum frequency...

Page 37: ...2 0 0 100 20 0 0 1 0 0 2 20 120 Or Or 1 0 1 For example if you want 5MHz trigger clock at the CC1 or CC2 you set the CC that you want at the CC Cfg button Delay Width Blank setting is as follows Trig...

Page 38: ...hase up It is used a Rising Edge of AB Phase AB Phase dn It is used a Falling Edge of AB Phase A B phase Up A Phase B Phase A B phase Down A Phase B Phase 8 Trigger Start When click it starts a Area C...

Page 39: ...qsystem com 11 Auto Save toggle If the box clicks image data is stored as a BMP JPEG binary file Hexa Value below the specified D SAVE or user selected folder JPEG does not work with 64 bit OS The bot...

Page 40: ...gital Input Output Characteristics Number of Digital I O Lines 4 pair Differential Input 4 TTL Input 2 TTL Output Clocks Pixel Clock Frequency Range 20MHz to 85MHz Caution A Camera link specification...

Page 41: ...ge 3 3V Max 500mA 12V Max 1A Physical Characteristics Camera Interface Camera Link 1 1 Dimension 100 x 79 5 mm Environment Caution When using internal Operating Temperature 0 60 Storage Temperature 20...

Page 42: ...SB3 FRM13_K Users Manual Rev 1 0 42 http www daqsystem com A 2 Physical Dimension The approximate external dimensions of the board are as follows For more detailed measurements ask the person in charg...

Page 43: ...eferences 1 USB 3 0 System Architecture Don Anderson USB SIG www usb org 2 Universal Serial Bus Specification Compaq Intel Microsoft NEC MindShare Inc Addison Wesley 3 AN201 How to build application u...

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