6M3P Camera User’s Manual
28
DALSA
03-32-10005-02
Free Running (Programmed Integration):
This mode is the camera’s default. The camera speed is controlled by writing a 3-byte
integration time value (in µs) to the three Integration Time registers. These three bytes are
then combined to form a 24 bit integration time. The number represents the integer
number of microseconds the camera will collect light. The number programmed in the
three registers should not be below 10
P
S (0000Ah). The camera will run at maximum
speed for the programmed integration time.
The camera’s default integration time value is 638 ms which achieve 1 fps.
Example: Set integration time to 1000ms
1.
Using the command 82h, set bit [7] of the data byte to 0 (Integration Mode =
Internal) and bit [3] of the data byte to 0 (Trigger Mode = Internal).
2.
Use commands 8Ah, 8Bh, 8Ch to set the 24-bit integration time value.
Value
= 1000ms
= 1000000µs
= F4240h
Write Integration LS
Byte
Write Integration
Center Byte
Write Integration MS
Byte
Comma
nd
Value
Command
Value
Command
Value
Binary
1000 1010
0100 0000
1000 1011
0100 0010
1000 1100
0000 1111
Hex
8Ah
40h
8Bh
42h
8Ch
0Fh
Programmed Integration/SMA Trigger
For external SMA controlled triggering with a programmed integration time, a TTL rising
edge on the TRIGGER IN (or SYNC) signal triggers the camera to acquire one frame of
data. Integration begins within 200ns after the rising edge and stops when the
programmed integration time has completed. After that single frame acquisition, the
camera outputs the just acquired frame and “re-arms”, thus waiting for a new External
Trigger signal to trigger a new frame acquisition. The camera is “armed” when the read
out of the acquired frame is completed. No additional rising edges, or triggers, should be
allowed during the image acquisition or frame read out.
When the camera is in External Trigger Mode, the Frame LED will be illuminated on the
camera back to indicate the camera is expecting a signal on the SMA connector or serial
bit [7].
Because this signal is internally OR’ed with the Serial Trigger input, care must be taken to
ensure the serial bit [7] of register 3 is equal to a logic 0 while in SMA Trigger mode.