Daewoo DV-F24S, Service Manual

Page: 19 / 110

17
The signal from the PREAMP circuit is fed to Pin 38 of IC301 and then this signal is amplified by 60dB (almost 1000 times).
The signal from Pin 38 of IC301 is filtered by the LPF. That is, the LPF is used to eliminate the luminance signal. The down-
converted colour signal (627KHz) from the LPF is fed to the Main Converter through the ACC amplifier circuit. The output
from the Main Converter is fed to Pin 23 and 24 of IC301 through a BPF (4.43MHz). The colour signal frequency of Pin 24 of
IC301 is 4.433619MHz. The output signal at Pin 24 of IC301 (LA7437) is input to Pin 1 of IC303 (LA7356: SECAM
DETECTOR) in order to detect whether the colour signal is PAL or MESECAM. After filtering out the crosstalk components
by an external CCD IC (LC89970), this signal is input to Pin 26 of IC301. The output of Pin 26 is fed to Pin 29 of IC301
through a PB AMP/Killer and NAP circuit. The colour signal from Pin 29 is fed to the Y/C Mixer through Pin 28.
E. Signal flow of the SECAM colour in the record mode
The video signal is input to a 4.3MHz BPF through Pin 1 of ICL01 (BA7207S: SECAM colour). The signal at Pin 1 is fed to
the REC BELL circuit to be de-emphasized.
The REC BELL output is then fed to Pin 26 of ICL01.
This signal is input to Pin 1 of ICL02 (LA7356: SECAM DETECTOR) and Pin 24 of ICL01 (BA7207S)
The signal input to Pin 1 of ICL02 is used to detect whether the signal is SECAM or non-SECAM. If this signal is the SECAM
colour, the voltage at Pin 10 of ICL02 is high (almost 4.0 volts). If not, the voltage at Pin 10 of ICL02 is low.
The other signal from Pin 26 of ICL01 is fed to Pin 24 of ICL01 through the 12dB AMP circuit (consists of RL425, RL426,
RL427, RL428, RL429, CL429 and QL413). The signal from Pin 24 is fed to the Limiter. In this Limiter circuit, the output
amplitude is limited. The Limiter output is fed to a 1/4 divider circuit in order for the colour signal to be divided by 4. This
signal is then fed to the REC SYNC GATE circuit. The noise of the SYNC part is removed by the REC SYNC GATE. The
REC SYNC GATE output is fed to the 1.1MHz BPF so that the unwanted signal can be eliminated. The 1.1MHz BPF output
is fed to Pin 28 of ICL01 through the REC EQ circuit.
4.3 MHz
BPF
REC
BELL
Main
De-empha
1/4 Divider
Limiter
12dB
AMP
q !
PB colour input
=
REC
SYNC GATE
1.1 MHz
BPF
REC
EQ
=
REC SECAM
BLOCK 5. RECORD SECAM COLOUR SIGNAL FLOW