Czar PP-8300, User Manual

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Hardware Prefetcher
The processor has a hardware prefetcher that automatically analyzes its requirements and prefetches
data and instructions from the memory into the Level 2 cache that are likely to be required in the near
future. This reduces the latency associated with memory reads. Options: Enabled (Default) / Disabled
Adjacent Cache Line Prefetch
The processor has a hardware adjacent cache line prefetch mechanism that automatically fetches an
extra 64-byte cache line whenever the processor requests for a 64-byte cache line. This reduces cache
latency by making the next cache line immediately available if the processor requires it as well.
Options: Enabled (Default) / Disabled
TCC Activation offset
Offset from the factory TCC activation temperature
Options: 0 (Default)
CPU Max Current limit value (Amp)
The Maximum instantaneous current allow for Primary Plane.
IGFX Max Current limit value (Amp)
The Maximum instantaneous current allow for Secondary Plane.
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