Cypress S6J3200 Series, Manual

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CHAPTER 21:Ethernet MAC
634 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.5.
Transmit Status Register (ETHERNETn_transmit_status)
Description of Transmit Status register is shown.
REGISTER_NAME ETHERNETn_transmit_status
OFFSET 0x014
ACCESS_SIZE W
MULTIPLE
NUMERIC_TYPE
OTHER
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME Reserved
ACCESS_TYPE R0,WX
PROT_TYPE Wp
INITIAL_VALUE 0x00
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME Reserved
ACCESS_TYPE R0,WX
PROT_TYPE Wp
INITIAL_VALUE 0x00
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME Reserved resp_not_ok
ACCESS_TYPE R0,WX R,W1C
PROT_TYPE Wp
INITIAL_VALUE 0x00 0
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME
late_collisio
n_occurred
transmit_un
der_run
transmit_co
mplete
amba_error transmit_go
retry_limit_e
xceeded
collision_oc
curred
used_bit_re
ad
ACCESS_TYPE R,W1C R,W1C R,W1C R,W1C R,WX R,W1C R,W1C R,W1C
PROT_TYPE Wp
INITIAL_VALUE 0 0 0 0 0 0 0 0
[bit31:9] Reserved
Always read "0". Writing has no effect
[bit8] resp_not_ok: Response not OK
Set to "1" when the Ethernet MAC DMA sees BRESP not OK. Cleared by writing a "1" to this bit.
[bit7] late_collision_occurred: Late collision occurred
Only set.if the condition occurs in gigabit mode, as retry is not attempted. Cleared by writing a one to
this bit.