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CHAPTER1: Flash Memory

3. Operations

P E R I P H E R A L M A N U A L

14

S6E1Cx_MN710-00016-1v0-E, August 31, 2015

CONFIDENTIAL

3.1

Automatic Algorithm

Writing to and erasing Flash memory is performed by activating the automatic algorithm.
This section explains the automatic algorithm.

3.1.1    Command Sequences
3.1.2    Command Operations
3.1.3    Automatic Algorithm Run States

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Summary of Contents for S6E1C1 Series

Page 1: ...ily FLASH PROGRAMMING MANUAL Publication Number S6E1Cx_MN710 00016 1v0 E Revision 1 0 Issue Date August 31 2015 CONFIDENTIAL For the information for microcontroller supports see the following web site...

Page 2: ...P E R I P H E R A L M A N U A L 2 S6E1Cx_MN710 00016 1v0 E August 31 2015 CONFIDENTIAL...

Page 3: ...the content of the flash memory This chapter section describes the overview and operations of the flash security CHAPTER 3 Serial Programming Connection This chapter explains the basic configuration f...

Page 4: ...ndicates access in units of 16 bits Byte Indicates access in units of 8 bits Notations The notations in bit configuration of the register explanation of this manual are written as follows bit bit numb...

Page 5: ...roducts FM0 TYPE3 M0 product list Type name Flash memory size 64Kbyte 128Kbyte TYPE3 M0 S6E1C11B0A S6E1C11C0A S6E1C11D0A S6E1C31B0A S6E1C31C0A S6E1C31D0A S6E1C12B0A S6E1C12C0A S6E1C12D0A S6E1C32B0A S6...

Page 6: ...peration 25 3 2 5 Sector Erase Suspended Operation 27 3 2 6 Sector Erase Restart Operation 28 3 3 Cautions When Using Flash Memory 29 4 Registers 30 4 1 Flash Read Wait Register FRWTR 31 4 2 Flash Sta...

Page 7: ...iew configuration operation and registers of the Flash memory This series is equipped with the Flash Memory of up to 128Kbyte for which Flash erase simultaneous data erase of all sectors data erase of...

Page 8: ...MHz 0Wait Operating mode 1 CPU mode This mode allows reading writing and erasing of flash memory from CPU automatic algorithm The operation of writing data by byte 8 bits or by half word 16 bits is av...

Page 9: ...ress and sector structure of the Main Flash memory built into this series as well as the address of security CR trimming data See CHAPTER Flash Security for details on the security See section 4 6 CR...

Page 10: ...CHAPTER1 Flash Memory 2 Configuration P E R I P H E R A L M A N U A L 10 S6E1Cx_MN710 00016 1v0 E August 31 2015 CONFIDENTIAL Figure 2 1 Address and Sector Structure of 64Kbyte Flash Memory...

Page 11: ...ry 2 Configuration P E R I P H E R A L M A N U A L August 31 2015 S6E1Cx_MN710 00016 1v0 E 11 CONFIDENTIAL Figure 2 2 Address and Sector Structure of 128Kbyte Flash Memory Figure 2 3 Address of Securi...

Page 12: ...CHAPTER1 Flash Memory 2 Configuration P E R I P H E R A L M A N U A L 12 S6E1Cx_MN710 00016 1v0 E August 31 2015 CONFIDENTIAL Figure 2 4 Bit Configuration of CR Trimming Area...

Page 13: ...E R I P H E R A L M A N U A L August 31 2015 S6E1Cx_MN710 00016 1v0 E 13 CONFIDENTIAL 3 Operations This section explains the Flash memory operation 3 1 Automatic Algorithm 3 2 Flash Memory Operation...

Page 14: ...00016 1v0 E August 31 2015 CONFIDENTIAL 3 1 Automatic Algorithm Writing to and erasing Flash memory is performed by activating the automatic algorithm This section explains the automatic algorithm 3 1...

Page 15: ...epeat the 6th write operation for the required times By writing 0x30 in the last sector address the erase operation is started Notes The data notation in Table 3 1 only shows the lower 8 bits The uppe...

Page 16: ...ory starts After executing the automatic write algorithm command sequence there is no need to control the flash memory externally See Section 3 2 2 Write Operation for details on the actual operation...

Page 17: ...during sector erase It is ignored even if it is issued during flash erase or during write During the sector erase suspended state the flash erase and the erase of sectors other than erase target sect...

Page 18: ...re the first value of the Flash Status Register that is read immediately after issuing a command Status of each bit and Flash memory For the correspondence between each bit of the Flash Status registe...

Page 19: ...Status the Program Write Operation command can be issued to the sectors not to erase By issuing the command the RDY bit is set to 0 and PGMS bit is set to 1 to transfer to Program Write Operation stat...

Page 20: ...ust 31 2015 CONFIDENTIAL 3 2 Flash Memory Operation The operation of the Flash memory is explained for each command 3 2 1 Read Reset Operation 3 2 2 Write Operation 3 2 3 Flash Erase Operation 3 2 4 S...

Page 21: ...address within the address range of the flash memory Because the read reset state is the default state of the flash memory the flash memory always returns to this state when the power is turned on or...

Page 22: ...memory externally 2 Confirm Flash Status Register FSTR After issuing the program write command the RDY bit and PGMS bit of the Flash Status Register are set to 0 and 1 respectively After the write op...

Page 23: ...f Flash Status Register FSTR after the command issued Although the flash memory can be written in any sequence of addresses regardless of crossing sector boundaries only a single byte or a single half...

Page 24: ...mmand sequentially to the target sector See Section 3 1 Automatic Algorithm for details on the flash erase command 1 Issue the flash erase command sequentially The automatic algorithm is activated and...

Page 25: ...se multiple sectors write 0xE0 as the 6th write data command data By writing 0xE0 to the 7th sector address and later sectors could be added to be erased Write 0x30 in the last sector address then the...

Page 26: ...ode 0x0030 to sector to be erased There is another sector to be erased SERS 0 RDY 1 End of sector erase Yes No Failure of sector erase erase Write erase code 0x00E0 to sector to be erased Read FSTR du...

Page 27: ...restart the suspended erase operation Sector Erase Suspended Operation Sector erase is suspended in the following steps 1 Write the sector erase suspended command to an address of even number within...

Page 28: ...to any address of even number in the address range of the flash memory while sector erase is suspended sector erase can be restarted When the sector erase restart command is issued the sector erase op...

Page 29: ...t is necessary to prevent an unexpected reset like Watchdog Timer from occurring during the writing and erasing Immediately after issuing the automatic algorithm command to the flash memory always per...

Page 30: ...ry List of Registers of Flash Memory Table 4 1 List of Registers of Flash Memory Abbreviation Register Name Reference FRWTR Flash Read Wait Register 4 1 FSTR Flash Status Register 4 2 FICR Flash Inter...

Page 31: ...wait cycle for the Flash Memory bit Description 000 0 cycle wait mode This setting can be used when HCLK is 10MHz or less 001 0 to 1 cycle wait mode This setting should be specified when HCLK is 20MH...

Page 32: ...on 0 The program is not being written to the flash memory Initial value 1 The program is being written to the flash memory bit4 SERS Flash Sector Erase Status Indicates the sector erase status of the...

Page 33: ...tion 3 1 1 Command Sequences bit Description 0 The flash memory HANG state has not been detected Initial value 1 The flash memory HANG state has been detected bit0 RDY Flash Ready Status Indicates whe...

Page 34: ...HANGIE HANG Interrupt Enable This bit enables the flash HANG status interrupt When the HANGIF bit in the FISR register and this bit are both 1 an interrupt to CPU is generated bit Description 0 Flash...

Page 35: ...bit1 HANGIF HANG Interrupt Flag This bit is set to 1 when the Flash HANG status is detected This bit is set to 1 with the rising edge of HANG signal This bit is cleared to be 0 by writing 1 to the HA...

Page 36: ...HANG Interrupt Clear This bit is the clear bit of HANG interrupt flag This bit clears the HANGIF bit in the FISR register to 0 by writing 1 to this bit The read value is always 0 bit Description 0 Th...

Page 37: ...g Data Mirror Bit After a reset is released bit 6 0 CR Temperature Trimming Data at the address 0x0010_0006 in Flash Memory area are stored in this bit For details of High speed CR Trimming data see c...

Page 38: ...bits The read values are undefined Ignored on write bit3 0 SD Sync Down Specifies the wait cycle inserted in the read access of the flash memory Bit Description 0000 Setting prohibited 0001 1 wait cy...

Page 39: ...0 00016 1v0 E 39 CONFIDENTIAL CHAPTER2 Flash Security The flash security function protects contents of the flash memory This chapter explains the overview and operations of the flash security 1 Overvi...

Page 40: ...e flash memory access to the flash memory is restricted Once the flash memories are protected the protection cannot be released until a flash erase operation is performed This function is suitable for...

Page 41: ...ch mode Table 2 1 Flash Operation with Security Enabled Mode Mode pin MD0 MD1 Access to flash Access from debugging pin Flash erase Other commands Read User mode 0 x Enabled Enabled Valid data Disable...

Page 42: ...CHAPTER2 Flash Security 2 Operation Explanation P E R I P H E R A L M A N U A L 42 S6E1Cx_MN710 00016 1v0 E August 31 2015 CONFIDENTIAL...

Page 43: ...L CHAPTER3 Serial Programming Connection This series supports serial onboard write Cypress standard to flash memory This chapter explains the basic configuration for serial write to flash memory by us...

Page 44: ...programming tool for all microcontrollers with built in flash memory Two types of Serial Programmer are available according to the PC interface RS 232C or USB used Choose the type according to your e...

Page 45: ...amming UART communication mode is possible by any clock crystal oscillator or built in High speed CR oscillator Figure 1 1 shows the basic configuration of Cypress MCU Programmer and Table 1 1 lists t...

Page 46: ...2 available frequencies and communication baud rates Figure 1 2 Connection Example when Using a Crystal Oscillator Table 1 2 Oscillating Frequency and Communication Baud Rate Available for Clock Asyn...

Page 47: ...when built in high speed CR oscillator is used The following are the restrictions when built in high speed CR oscillator is used Because the oscillation frequency of the built in high speed CR oscill...

Page 48: ...m are connected through a USB cable Figure 1 4 shows the basic configuration of Cypress USB DIRECT Programmer and Table 1 1 lists the system configuration Figure 1 4 Basic Configuration of Cypress USB...

Page 49: ...oducts 10k 10k USB connector Vbus D D GND Note The pull up and pull down resistance values shown are for example Select the most appropriate resistance values for each system Insert a level shifter fo...

Page 50: ...Products 10k 10k USB connector Vbus D D GND Note The pull up and pull down resistance values shown are for example Select the most appropriate resistance values for each system Insert a level shifter...

Page 51: ...4pin and 48pin Products 10k 10k Regulator 3 3V output USB connector Vbus D D GND UDM0 UDP0 VSS P60 INT15_1 VCC INITX P61 UHCONX Note The pull up and pull down resistance values shown are for example S...

Page 52: ...r 32pin and 26pin Products 10k 10k Regulator 3 3V output USB connector Vbus D D GND UDM0 UDP0 VSS P60 INT15_1 VCC INITX P21 Note The pull up and pull down resistance values shown are for example Selec...

Page 53: ...s select pin UART serial data input pin Setting the input level of this pin to H until the start of communication enables the clock asynchronous communication mode and setting it to L enables the cloc...

Page 54: ...CHAPTER3 Serial Programming Connection 1 Serial Programmer P E R I P H E R A L M A N U A L 54 S6E1Cx_MN710 00016 1v0 E August 31 2015 CONFIDENTIAL...

Page 55: ...P E R I P H E R A L M A N U A L August 31 2015 S6E1Cx_MN710 00016 1v0 E 55 CONFIDENTIAL Major Changes Page Section Changes Revision 1 0 Initial release...

Page 56: ...P E R I P H E R A L M A N U A L 56 S6E1Cx_MN710 00016 1v0 E August 31 2015 CONFIDENTIAL...

Page 57: ...U A L August 31 2015 S6E1Cx_MN710 00016 1v0 E 57 CONFIDENTIAL MN710 00016 1v0 E Cypress Controller Manual FM0 Family 32 Bit Microcontroller FLASH PROGRAMMING MANUAL August 2015 Rev 1 0 Published Cypr...

Page 58: ...n of over current levels and other abnormal operating conditions If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign...

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