CHAPTER1: Flash Memory
1.
P E R I P H E R A L M A N U A L
8
S6E1Cx_MN710-00016-1v0-E, August 31, 2015
CONFIDENTIAL
1. Overview
This series is equipped with up to 128Kbyte Flash Memory.
The built-in Flash Memory could erase data by-sector, or erase flash (erase data by-all-sector collectively),
and write programmed data by byte (8 bits) or by half-word (16 bits) with the Cortex-M0+ CPU.
Flash Memory Features
Usable capacity: Up to 128Kbyte (including 16Byte of security and trimming bytes)
Detection of write/erase completion with CPU interrupt
High-speed flash memory:
Up to 10 MHz: 0Wait
Operating mode:
1. CPU mode
This mode allows reading, writing, and erasing of flash memory from CPU (automatic algorithm*).
The operation of writing data by byte (8 bits) or by half word (16 bits) is available.
To rewrite data, execute a program on RAM.
2. ROM writer mode
This mode allows reading, writing, and erasing of flash memory from a ROM writer (automatic
algorithm*).
Built-in flash security function
(Prevents reading of the content of flash memory by a third party)
See "CHAPTER Flash Security" for details on the flash security function.
Note:
−
This document explains the usage of flash memory in CPU mode.
For details on accessing the flash memory from a ROM writer, see the instruction manual of the
ROM writer that is being used.
*: Automatic algorithm = Embedded Algorithm
