Cypress PSoC DESIGNER ImageCraft M8C, Manual

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12 ImageCraft Assembly Language Guide, Document # 001-44475 Rev. *B
M8C Microprocessor
With the exception of the CPU_F register, the M8C internal registers are not accessible via an
explicit register address. PSoC parts in the CY8C25xxx and CY8C26xxx device family do not have a
readable CPU_F register. The
OR F, expr
and
AND F, expr
instructions must be used to set and
clear CPU_F register bits. The internal M8C registers are accessed using special instructions such
as:
■
MOV A, expr
■
MOV X, expr
■
SWAP A, SP
■
OR F, expr
■
JMP
The CPU_F register may be read by using address
0xF7
in any register bank, except in CY8C25xxx
and CY8C26xxx devices.
2.2 Address Spaces
The M8C microcontroller has three address spaces: ROM, RAM, and registers. The Read Only
Memory (ROM) address space is accessed via its own address and data bus.
Figure 2-1 illustrates
the arrangement of the PSoC device address spaces.
The ROM address space is composed of the Supervisory ROM and the on-chip Flash program
store. Flash is organized into 64-byte blocks. The user need not be concerned with program store
page boundaries, because the M8C automatically increments the 16-bit CPU_PC register (
PC
) on
every instruction making the block boundaries invisible to user code. Instructions occurring on a 256-
byte Flash page boundary (with the exception of jump instructions) incur an extra M8C clock cycle
because the upper byte of the Program Counter (PC) is incremented.
The register address space is used to configure the PSoC device’s programmable blocks. It consists
of two banks of 256 bytes each. To switch between banks, the XIO bit in the Flag register is set or
cleared (set for Bank1 = Configuration Space, cleared for Bank0 = User Space). The common con-
vention is to leave the bank set to Bank0 (XIO cleared), switch to Bank1 as needed (set XIO), then
switch back to Bank0.
RAM is broken into 256-byte pages. For PSoC devices with 256 bytes of RAM or less, the program
stack is stored in RAM Page 0. For PSoC devices with 512 bytes of RAM or more, the stack is con-
strained to the last RAM page. For information on RAM configuration in a specific device, refer to the
device-specific data sheet.
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