Cypress PSoC CY8CTMG20 Series, Technical Reference Manual

Page: 242 / 308

242 PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
INT_CLR0
0,DAh
21.3.54 INT_CLR0
Interrupt Clear Register 0
This register enables the individual interrupt sources’ ability to clear posted interrupts.
When bits in this register are read, a ‘1’ is returned for every bit position that has a corresponding posted interrupt. When bits
in this register are written with a ’0’ and ENSWINT is not set, posted interrupts are cleared at the corresponding bit positions.
If there is no posted interrupt, there is no effect. When bits in this register are written with a ’1’ and ENSWINT is set, an inter-
rupt is posted in the interrupt controller
.
For additional information, refer to the Register Definitions on page 48 in the Interrupt Controller chapter.
7 I2C Read 0 No posted interrupt for I2C.
Read 1 Posted interrupt present for I2C.
Write 0 AND ENSWINT = 0 Clear posted interrupt if it exists.
Write 1 AND ENSWINT = 0 No effect.
Write 0 AND ENSWINT = 1 No effect.
Write 1 AND ENSWINT = 1 Post an interrupt for I2C.
6 Sleep Read 0 No posted interrupt for sleep timer.
Read 1 Posted interrupt present for sleep timer.
Write 0 AND ENSWINT = 0 Clear posted interrupt if it exists.
Write 1 AND ENSWINT = 0 No effect.
Write 0 AND ENSWINT = 1 No effect.
Write 1 AND ENSWINT = 1 Post an interrupt for sleep timer.
5 SPI Read 0 No posted interrupt for SPI.
Read 1 Posted interrupt present for SPI.
Write 0 AND ENSWINT = 0 Clear posted interrupt if it exists.
Write 1 AND ENSWINT = 0 No effect.
Write 0 AND ENSWINT = 1 No effect.
Write 1 AND ENSWINT = 1 Post an interrupt for SPI.
4 GPIO Read 0 No posted interrupt for general purpose inputs and outputs (GPIO) (pins).
Read 1 Posted interrupt present for GPIO (pins).
Write 0 AND ENSWINT = 0 Clear posted interrupt if it exists.
Write 1 AND ENSWINT = 0 No effect.
Write 0 AND ENSWINT = 1 No effect.
Write 1 AND ENSWINT = 1 Post an interrupt for general purpose inputs and outputs (pins).
(continued on next page)
Individual Register Names and Addresses:
0,DAh
INT_CLR0 : 0,DAh
7 6 5 4 3 2 1 0
Access : POR RW : 0 RW : 0 RW : 0 RW : 0 RW : 0 RW : 0 RW : 0 RW : 0
Bit Name I2C Sleep SPI GPIO Timer0 TrueTouch Analog V Monitor
Bit Name Description
[+] Feedback