PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
203
PMAx_DR
0,58h
21.3.16 PMAx_DR
PSoC Memory Arbiter Data Registers
These registers are PSoC Memory Arbiter write address registers.
For additional information, refer to the
Register Definitions on page 171
in the Full-Speed USB chapter.
7:0
Data Byte[7:0]
When the M8C writes to this register, the PMA registers the byte and then stores the value at the
address in SRAM indicated by the PMAx_WA register.
Individual Register Names and Addresses:
0,58h
PMA0_DR : 0,58h
PMA1_DR : 0,59h
PMA2_DR : 0,5Ah
PMA3_DR : 0,5Bh
PMA4_DR : 0,5Ch
PMA5_DR : 0,5Dh
PMA6_DR : 0,5Eh
PMA7_DR : 0,5Fh
PMA8_DR : 0,64h
PMA9_DR : 0,65h
PMA10_DR : 0,66h
PMA11_DR : 0,67h
PMA12_DR : 0,68h
PMA13_DR : 0,69h
PMA14_DR : 0,6Ah
PMA15_DR : 0,6Bh
7
6
5
4
3
2
1
0
Access : POR
RW : 00
Bit Name
Data Byte[7:0]
Bit
Name
Description
Summary of Contents for PSoC CY8CTMG20 Series
Page 4: ...4 Contents Overview Feedback...
Page 26: ...26 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Section B PSoC Core Feedback...
Page 82: ...82 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Sleep and Watchdog Feedback...
Page 134: ...134 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C I2C Slave Feedback...
Page 142: ...142 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C System Resets Feedback...
Page 160: ...160 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C SPI Feedback...
Page 182: ...182 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Full Speed USB Feedback...
Page 302: ...302 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Glossary Feedback...