Cypress PSoC CY8C23533, Technical Reference Manual

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Document # 001-20559 Rev. *D 45
3. Supervisory ROM (SROM)
This chapter discusses the Supervisory ROM (SROM) functions and its associated registers. For a complete table of the
SROM registers, refer to the
“Summary Table of the Core Registers” on page 32 . For a quick reference of all PSoC registers
in address order, refer to the Register Details chapter on page 47 .
3.1 Architectural Description
The SROM holds code that is used to boot the PSoC
device, calibrate circuitry, and perform Flash operations.
The functions provided by the SROM are called from code
stored in the Flash or by device programmers.
The SROM is used to boot the part and provide interface
functions to the Flash banks. ( Table 3-1 lists the SROM
functions.) The SROM functions are accessed by executing
the Supervisory System Call instruction (SSC) which has an
opcode of 00h. Before executing the SSC, the M8C’s
accu-
mulator needs to load with the desired SROM function code
from Table 3-1 .
Attempting to access undefined functions causes a halt. The
SROM functions execute code with calls; therefore, the
functions require stack space. With the exception of Reset,
all of the SROM functions have a
parameter block in
SRAM that you must configure before executing the SSC.
Table 3-2 lists all possible parameter block variables. The
meaning of each parameter , with regards to a specific
SROM function, is described later in this chapter. Because
the SSC instruction clears the CPU_F PgMode bits, all
parameter block variable addresses are in SRAM Page 0.
The CPU_F value is automatically restored at the end of the
SROM function.
Note For PSoC devices with more than 256 bytes of SRAM
(that is, more than 1 page of SRAM, see the table titled
“
PSoC Device SRAM Availability, on page 55 ”), the
MVR_PP and the MVW_PP pointers are not disabled by
clearing the CPU_F PgMode bits. Therefore, the POINTER
parameter is interpreted as an address in the page indicated
by the MVI page pointers, when the supervisory operation is
called. This allows the data
buffer used in the supervisory
operation to be located in any SRAM page. (See the RAM
Paging chapter on page 55 for more details regarding the
MVR_PP and MVW_PP pointers.)
Note ProtectBlock (described on page
49
) and EraseAll (described on page
49
) SROM functions are not listed in the table above because they depend
upon external programming.
Two important variables that are used for all functions are
KEY1 and KEY2. These variables are used to help discrimi-
nate between valid SSCs and inadvertent SSCs. KEY1 must
always have a value of 3Ah, while KEY2 must have the
same value as the stack pointer (SP) when the SROM func-
tion begins execution. This would be the SP value when the
SSC opcode is executed, plus three. For all SROM func-
tions except SWBootReset, if either of the keys do not
match the expected values, the M8C halts. The SWBootRe-
set function does not check the key values. It only checks to
see if the accumulator’s value is 0x00. The following code
example puts the correct value in KEY1 and KEY2. The
code is preceded by a HALT, to force the program to jump
directly into the setup code and not accidentally run into it.
Table 3-1. List of SROM Functions
Function Code Function Name
Stack Space
Needed
Page
00h SWBootReset 0 46
01h ReadBlock 7 47
02h WriteBlock 10
48
03h EraseBlock 9 48
06h TableRead 3 49
07h CheckSum 3 50
08h Calibrate0 4 50
09h Calibrate1 3 50