Cypress CYW9P62S1-43438EVB-01, Manual, Page: 43 / 46

CYW9P62S1-43438EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28692 Rev. ** 43
Hardware
3.3 PSoC 62S1 Wi-Fi BT Pioneer Kit Rework
3.3.1 ETM Trace Header
The 20-pin ETM trace header J12 is not loaded by default and the lines to the header are used as
I/Os on header J2. To connect the PSoC 6 MCU to the trace header, populate the resistors R126–
R129 and remove resistors R117, R123–R125.
Figure 3-18. ETM Trace Header
3.4 Bill of Materials
Refer to the BOM files in the kit webpage .
R123 0 OHM
R124 0 OHM
R125 0 OHM
R126 0 OHM
No Load
R127 0 OHM
No Load
R128 0 OHM
No Load
R129 0 OHM
No Load
PAD_A10
PAD_A11
PAD_A8
PAD_A9
A8
A11
A10
A9
TRACEDATA_1
TRACEDATA_0
TRACEDATA_3
TRACEDATA_2
R117 0 OHM
TRACE Multiplexed Pins