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Cypress CYW9P62S1-43438EVB-01, Manual, Page: 30 / 46

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CYW9P62S1-43438EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28692 Rev. **

30

Hardware

 

Carrier Module Footprint

MOD1C

WL_SDIO_DATA0

100

WL_SDIO_DATA1

101

WL_SDIO_DATA2

102

WL_SDIO_DATA3

104

WL_SDIO_CLK

99

WL_SDIO_CMD

103

WL_HOST_WAKE

14

WL_DEV_WAKE

15

WL_REG_ON

16

WL_UART_TX

11

WL_UART_RX

12

WL_IO_1

13

WL_IO_2

10

WL_JTAG_TCK

20

WL_JTAG_TMS

19

WL_JTAG_TRST_L

21

WL_JTAG_TDI

18

WL_JTAG_TDO

17

WL_JTAG_SEL

22

BT_UART_TXD

108

BT_UART_RXD

106

BT_UART_CTS

107

BT_UART_RTS

109

BT_HOST_WAKE

122

BT_DEV_WAKE

120

BT_REG_ON

121

BT_I2S_CLK

112

BT_I2S_WS

111

BT_I2S_DO

114

BT_I2S_DI

113

BT_IO_2

116

BT_IO_3

117

BT_IO_4

119

BT_IO_5

118

RFU_1

27

RFU_2

105

LPO_IN

110

BT_I2S_CLK

BT_I2S_DO

BT_I2S_WS

BT_I2S_DI

BT_UART_CTS
BT_UART_RTS

SDIO_DATA0

SDIO_CMD

SDIO_CLK

SDIO_DATA2

SDIO_DATA1

Carrier Module Wi-Fi BT Signals

SDIO_DATA3

BT_UART_RXD

BT_UART_TXD

WL_REG_ON

BT_REG_ON

WL_GPIO_1

WL_GPIO_2

R4

10K

R3

10K

DNI

WL_GPIO_2

VDDIO_WL

Summary of Contents for CYW9P62S1-43438EVB-01

Page 1: ...9P62S1 43438EVB 01 PSoC 62S1 Wi Fi BT Pioneer Kit Guide Doc 002 28692 Rev Cypress Semiconductor 198 Champion Court San Jose CA 95134 1709 Phone USA 800 858 1810 Phone Intnl 1 408 943 2600 www cypress...

Page 2: ...d hereby do release Cypress from any claim damage or other liability arising from any Security Breach In addition the products described in these materials may contain design defects or errors known a...

Page 3: ...idge 25 2 2 3 USB I2C Bridge 26 3 Hardware 27 3 1 Schematics 27 3 2 Hardware Functional Description 27 3 2 1 CYW9P62S1 43438CAR 01 MOD1 27 3 2 2 PSoC 5LP based KitProg3 U2 31 3 2 3 Serial Interconnect...

Page 4: ...factory has been verified to meet with the requirements of CE as a Class A product PSoC 62S1 Wi Fi BT Pioneer Boards contain electrostatic discharge ESD sensitive devices Electrostatic charges readil...

Page 5: ...rkstation If an ESD workstation is unavailable use appropriate ESD protection by wearing an anti static wrist strap attached to a grounded metal object Handling Boards CYW9P62S1 43438EVB 01 PSoC 62S1...

Page 6: ...rd features a PSoC 6 MCU and a CYW43438 Wi Fi Bluetooth combo module Cypress CYW43438 is a highly integrated single chip solution and offers the lowest BOM in the industry for smartphones tablets and...

Page 7: ...er Kit has the following contents as shown in Figure 1 1 PSoC 62S1 Wi Fi BT Pioneer Board USB Type A to Micro B cable Four jumper wires 4 inches each Two jumper wires 5 inches each Quick Start Guide F...

Page 8: ...ard on the Mbed OS platform There is a wide range of code examples to evaluate the PSoC 62S1 Wi Fi BT Pioneer Board These examples help you familiarize yourself with the PSoC 6 MCU and create your own...

Page 9: ...nyms Table 1 1 Document Conventions for Guides Convention Usage Courier New Displays file locations user entered text and source code C cd icc Italics Displays file names and reference documentation R...

Page 10: ...O Low Power Oscillator MAC Medium Access Control OOB Out of Box PC Personal Computer PDM Pulse Density Modulation PSoC Programmable System on Chip PWM Pulse Width Modulation QSPI Quad Serial Periphera...

Page 11: ...PPU IOSS GPIO PCLK 104 GPIOs 6 of these are OVT Pins EFUSE 1024 bits PSoC 62 Serial Memory I F QSPI with OTF Encryption Decryption DMA MMIO USB FS Host Device FS LS PHY FLASH 1024 32 KB FLASH Control...

Page 12: ...AG P5LP_VDD VDDIO0 2 x User Buttons 2 x CapSense Buttons 1 x 5 segment CapSense Slider 1 8 3 3V VTARG_REF UART_RTS Level Translator USB Device Host 1 8 3 3V VTARG_REF VTARG Monitoring CYW9 BASE 01 Arc...

Page 13: ...up capability GPIO on non Arduino header J21 9 P0 5 RGB green LED LED5 GPIO on non Arduino header J24 3 Arduino Uno R3 LEGEND PSoC 6 I Os WL BT I Os NC VTARG IOREF XRES RESET V 3 3 3 3V V 5 0 5V GND G...

Page 14: ...R61 to disconnect from KitProg3 P5 2 UART_RTS Arduino D2 J4 3 Remove R19 to disconnect from KitProg3 P5 3 UART_CTS Arduino D3 J4 4 Remove R18 to disconnect from KitProg3 P5 4 Arduino D4 J4 5 P5 5 Ardu...

Page 15: ...153 to connect to GPIO on non Arduino header P8 6 CapSense Slider3 RX GPIO on non Arduino header IO13 J21 6 Remove R31 to disconnect from CapSense Populate R151 to connect to GPIO on non Arduino heade...

Page 16: ...4 4 P11 2 QSPI Flash CS P11 3 6 QSPI Flash IO 3 0 P11 7 QSPI Flash CLK P12 0 Arduino header D11 J3 4 P12 1 Arduino header D12 J3 5 P12 2 Arduino header D13 J3 6 P12 3 Arduino header D10 J3 3 P12 4 GPI...

Page 17: ...S1 Wi Fi BT Pioneer Board Top View BT_UART_RTS UART interface with Host MCU PSoC 6 MCU BT_I2S_CLK I2S serial clock BT_I2S_WS I2S serial word select BT_I2S_DO I2S serial data out BT_I2S_DI I2S serial d...

Page 18: ...of operation of KitProg3 CMSIS DAP BULK CMSIS DAP HID or DAPLink modes For more details see the KitProg3 User Guide 5 PSoC 6 MCU VDD current measurement jumper J15 An ammeter can be connected to this...

Page 19: ...all of which are capable of both self capacitance CSD and mutual capacitance CSX operation allow you to evaluate Cypress fourth generation CapSense tech nology The slider and buttons have a 1 mm acryl...

Page 20: ...ty to PSoC 6 MCU GPIOs that are not connected to the Arduino compatible headers Some of these I Os are also connected to on board peripherals see Table 2 1 on page 13 for pin mapping 29 RGB LED LED5 T...

Page 21: ...the PC using the USB cable as shown in Figure 2 7 It enumerates as a USB Composite Device KitProg3 can operate either in CMSIS DAP Bulk mode default CMSIS DAP HID mode or DAPLink mode DAPLink mode is...

Page 22: ...2 9 New Application Creation Choose Board Support Package BSP c Select the application in the Choose Starter Application window and click Next as shown in Figure 2 10 You may optionally change the ap...

Page 23: ...e Program KitProg3 configuration as shown in Figure 2 12 Figure 2 12 Programming in ModusToolbox 4 ModusToolbox has an integrated debugger To debug a PSoC 6 MCU application in the Project Explorer sel...

Page 24: ...age 21 for programming the board 1 Connect the board to your PC using the provided USB cable through the KitProg3 USB connector 2 Open a terminal program and select the KitProg3 COM port Set the seria...

Page 25: ...KitProg3 to BULK with two UARTs Mode For more details on the KitProg3 USB UART functionality see the KitProg3 User Guide The primary UART and flow control lines between the PSoC 6 MCU and the KitProg3...

Page 26: ...ftware which acts as an I2C master The I2C lines on the PSoC 6 MCU are hard wired on the board to the I2C lines of the KitProg3 with onboard pull up resistors as Figure 2 17 shows The USB I2C supports...

Page 27: ...are used for different voltage rails and I O signals of PSoC 6 MCU and CYW43438 For more information see the PSoC 6 MCU webpage AzureWave AW CU427 01H webpage PSoC 6 MCU datasheet and CYW43438 datash...

Page 28: ...E10 P6_7 D10 P7_0 F10 P7_3 H9 P7_4 G9 P7_5 G10 XRES_L J2 P9_0 P9 P9_1 N9 P9_2 M10 P9_3 N8 P9_4 P10 P9_5 N10 P9_6 R10 P10_0 R7 P10_1 R6 P10_2 P7 P10_3 L6 P10_4 N7 P10_5 M7 P10_6 M6 P11_0 R4 P11_1 L4 P...

Page 29: ...I2C_SDA 133 CSX_TX 124 CSB_0 33 CSB_1 31 CSS_0 36 CSS_1 34 CSS_2 32 CSS_3 38 CSS_4 37 CSD_SHIELD 98 FRAM_SSEL 71 FLASH_SSEL 72 QSPI_CLK 66 QSPI_DATA0 70 QSPI_DATA1 74 QSPI_DATA2 65 QSPI_DATA3 73 SD_CM...

Page 30: ...T_L 21 WL_JTAG_TDI 18 WL_JTAG_TDO 17 WL_JTAG_SEL 22 BT_UART_TXD 108 BT_UART_RXD 106 BT_UART_CTS 107 BT_UART_RTS 109 BT_HOST_WAKE 122 BT_DEV_WAKE 120 BT_REG_ON 121 BT_I2S_CLK 112 BT_I2S_WS 111 BT_I2S_D...

Page 31: ...TP2 TP3 UART_1_RX UART_1_TX TP19 RED No Load P5LP_VDD VTARG_MEAS UART_1_RTS KP_SWCLK KP_SWDIO UART_2_RX UART_1_CTS C11 1uF 10V C12 1uF 10V UART_2_TX R12 22E R2 0 OHM C13 1uF 10V R11 22E U2 CY8C5868LTI...

Page 32: ...P_SWCLK R35 0 OHM XRES_L_MCU KP_SWDIO RESET Target MCU SWD KitProg3 Interface TCLK_SWCLK R133 4 7K No Load R134 4 7K No Load P6_VDD R58 0 OHM R59 0 OHM KP_I2C_SDA P6_I2C_SDA P6_I2C_SCL KitProg3 I2C In...

Page 33: ...L P5LP_VDD KP_GPIO_0 KitProg3 Level Translator for Secondary UART and GPIO VDDIO_WL UART_2_TX UART_2_CTS UART_2_RTS UART_2_RX B_KP_GPIO_0 KP_GPIO_1 UART_2_RTS P5LP_VDD R136 100K No Load R137 100K No L...

Page 34: ...AT VBAT_WL 3 2 4 2 3 6V 3 3V J9 VCC_VDDIO2_IN VDDIO2_MCU VDDIO_WL 1 7 1 9 1 8V J16 not loaded VTARG VDDD_MCU VDDIO1_MCU VDDA_MCU VDD_NS_MCU VBACKUP_MCU 1 7 3 6 3 3V J14 not loaded VCC_VDDIO0 VDDIO0_MC...

Page 35: ...VTARG at VCC_3V3 configuration and hence R83 is loaded and J14 is not loaded Figure 3 7 Voltage Selection Headers VCC_VDDIO0 voltage can be selected between VCC_3V3 and VCC_1V8 using zero ohm resisto...

Page 36: ...nt Measurement Headers Note When measuring P6_VDD current make sure that the J25 jumper is removed This will disconnect the potentiometer from VDDA and removes the leakage caused by it Table 3 2 Curre...

Page 37: ...provide connectivity to a few of the CYW43438 GPIOs that are available at the cas tellated pads All these I Os work at VDDIO_WL voltage 1 8 V by default Figure 3 10 I O Headers ARD_D0 ARD_D4 ARD_D3 A...

Page 38: ...sign guidelines see the Getting Started with CapSense Design Guide Note that CapSense Shield functionality is not available on this kit Figure 3 11 Schematics of CapSense Circuit Simultaneous GPIO swi...

Page 39: ...rd has two user controllable LEDs LED8 and LED9 and an RGB LED LED5 connected to PSoC 6 MCU pins for user applications Figure 3 12 LEDs KitProg3 Status LED P5LP1_4 LED2 YELLOW R10 750 OHM LED1 YELLOW...

Page 40: ...as a Cypress NOR flash memory S25FL512SAGM FI010 of 512Mb capacity The NOR flash is connected to the Quad SPI interface of the PSoC 6 MCU device The NOR flash device can be used for both data and code...

Page 41: ...sed through a Quad SPI interface The F RAM is 4 Mbit 512K 8 and is capa ble of Quad SPI speed up to 108 MHz but the PSoC 6 MCU QSPI is limited to 80 MHz Figure 3 15 Schematics of Quad SPI F RAM U4 CY1...

Page 42: ...umper J25 to disconnect power from the potentiometer when measuring P6_VDD current Figure 3 17 Schematics of Potentiometer C63 0 1uF 16V C60 22uF 25V USB Host VBUS Enable VCC_1V8 U11 74LVC1G07GW 125 N...

Page 43: ...on header J2 To connect the PSoC 6 MCU to the trace header populate the resistors R126 R129 and remove resistors R117 R123 R125 Figure 3 18 ETM Trace Header 3 4 Bill of Materials Refer to the BOM file...

Page 44: ...to 3 3 V Can t it drive external 5 V interfaces The PSoC 6 MCU is not meant to be operated at voltages greater than 3 6 V Powering a PSoC 6 to more than 4 V will damage the chip It is recommended to p...

Page 45: ...d J12 However this can be by passed by loading R130 Note This modification is not recommended as the target MCU will have no protection and will be permanently damaged if 5V is supplied Figure 3 19 VT...

Page 46: ...uide Doc 002 28692 Rev 46 Revision History Document Revision History Document Title CYW9P62S1 43438EVB 01 PSoC 62S1 Wi Fi BT Pioneer Kit Guide Document Number 002 28692 Revision ECN Number Issue Date...

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