Appendix
AN66308 - CY8CMBR2044 CapSense® Design Guide, Doc. No. 001-66308 Rev. *F
42
Schematic 2: Three Buttons with Advanced Features enabled
In the above schematic, the device is configured as:
CS0
– CS2 pins: 560 Ω to CapSense buttons; CS3 pin: Ground
o
Three CapSense buttons (CS0
– CS2)
o
CS3 not used in design
GPO0
– GPO2 pins: LED and 560 Ω to VDD; GPO3 floating; GPO0-GPO1 pins interfaced to Master
o
CapSense buttons driving three LEDs (GPO0
– GPO2)
o
GPO0, GPO1 interfaced to master for direct status read
CMOD pin: 2.2 nF to Ground
o
Modulator capacitor
XRES pin: Floating
o
For external reset
Toggle/FSS pin: 5.1 kΩ to Ground
o
Toggle ON/OFF disabled
o
FSS enabled
ARST pin: 5 kΩ to Ground
o
Button Auto Reset enabled, Auto Reset period = 20 seconds
