CY8C21634, CY8C21534
CY8C21434, CY8C21334, CY8C21234
Document Number: 38-12025 Rev. *O
Page 14 of 45
19
IO
P3[3]
20
IO
P3[1]
21
NC
No connection.
22
NC
No connection.
23
IO
P1[7]
I2C Serial Clock (SCL).
24
IO
P1[5]
I2C Serial Data (SDA).
25
NC
No connection.
26
IO
P1[3]
I
FMTEST
.
27
IO
P1[1]
Crystal Input (XTALin), I2C Serial Clock (SCL), ISSP-SCLK
[3]
..
28
Power
Vss
Ground connection.
29
NC
No connection.
30
NC
No connection.
31
IO
P1[0]
Crystal Output (XTALout), I2C Serial Data (SDA), ISSP-SDATA
[3]
..
32
IO
P1[2]
V
FMTEST
.
33
IO
P1[4]
Optional External Clock Input (EXTCLK).
34
IO
P1[6]
35
NC
No connection.
36
NC
No connection.
37
NC
No connection.
38
NC
No connection.
39
NC
No connection.
40
NC
No connection.
41
Input
XRES
Active high external reset with internal pull down.
42
OCD
HCLK
OCD high-speed clock output.
43
OCD
CCLK
OCD CPU clock output.
44
IO
P3[0]
45
IO
P3[2]
46
NC
No connection.
47
NC
No connection.
48
IO
I
P2[0]
49
IO
I
P2[2]
50
IO
P2[4]
51
IO
P2[6]
52
IO
I
P0[0]
Analog column mux input.
53
IO
I
P0[2]
Analog column mux input and column output.
54
IO
I
P0[4]
Analog column mux input and column output.
55
IO
I
P0[6]
Analog column mux input.
56
Power
Vdd
Supply voltage.
LEGEND
: A = Analog, I = Input, O = Output, and OCD = On-Chip Debug.
Table 7. Pin Definitions - CY8C21001 56-Pin (SSOP)
(continued)
Pin No.
Type
Pin Name
Description
Digital
Analog
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