CY7C185
6
Notes:
14. The minimum write cycle time for write cycle #3 (WE controlled, OE LOW) is the sum of t
HZWE
and t
SD
.
15. If CE
1
goes HIGH or CE
2
goes LOW simultaneously with WE HIGH, the output remains in a high-impedance state.
Switching Waveforms
(continued)
t
WC
t
AW
t
SA
t
HA
t
HD
t
SD
t
SCE1
WE
DATA I/O
ADDRESS
CE
1
C185–9
DATA
IN
VALID
t
SCE2
CE
2
Write Cycle No. 2 (CE Controlled)
[12,13,14]
t
HD
t
SD
t
LZWE
t
SA
t
HA
t
AW
t
WC
t
HZWE
C185–10
DATA
IN
VALID
t
SCE1
t
SCE2
CE
1
CE
2
ADDRESS
DATA I/O
WE
Write Cycle No. 3 (WE Controlled, OE LOW)
[12,13,14,15]
NOTE 13
