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PRELIMINARY

CY7C1333H

Document #: 001-00209 Rev. **

Page 10 of 12

NOP, STALL and DESELECT Cycles

[18, 19, 21]

ZZ Mode Timing

[22, 23]

Switching Waveforms

 

 (continued)

READ

Q(A3)

4

5

6

7

8

9

10

A3

A4

A5

D(A4)

1

2

3

CLK

CE

WE

CEN

BW

[A:B]

ADV/LD

ADDRESS

DQ

COMMAND

WRITE

D(A4)

STALL

WRITE

D(A1)

READ

Q(A2)

STALL

NOP

READ

Q(A5)

DESELECT

CONTINUE

DESELECT

DON’T CARE

UNDEFINED

tCHZ

A1

A2

Q(A2)

D(A1)

Q(A3)

tDOH

Q(A5)

t

ZZ

I

SUPPLY

CLK

ZZ

t

ZZREC

ALL INPUTS

(except ZZ)

DON’T CARE

I

DDZZ

t

ZZI

t

RZZI

Outputs (Q)

High-Z

DESELECT or READ Only

Ordering Information

Speed

(MHz)

Ordering Code

Package

Name

Package Type

Operating

Range

133

CY7C1333H-133AXC

A101

Lead-Free 100-lead Thin Quad Flat Pack (14 x 20 x 1.4 mm)

Commercial

CY7C1333H-133AXI

A101

Lead-Free 100-lead Thin Quad Flat Pack (14 x 20 x 1.4 mm)

Industrial

100

CY7C1333H-100AXC

A101

Lead-Free 100-lead Thin Quad Flat Pack (14 x 20 x 1.4 mm)

Commercial

CY7C1333H-100AXI

A101

Lead-Free 100-lead Thin Quad Flat Pack (14 x 20 x 1.4 mm)

Industrial

Shaded area contains advance information. Please contact your local Cypress sales representative for availability of this part. 

21. The IGNORE CLOCK EDGE or STALL cycle (Clock 3) illustrated CEN being used to create a pause. A write is not performed during this cycle.
22. Device must be deselected when entering ZZ mode. See Truth Table for all possible signal conditions to deselect the device.
23. I/Os are in three-state when exiting ZZ sleep mode.

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Summary of Contents for CY7C1333H

Page 1: ...ith data being transferred on every clock cycle This feature dramatically improves the throughput of data through the SRAM especially in systems that require frequent Write Read transitions All synchr...

Page 2: ...B DQB DQB DQB VSS VDDQ DQB DQB VSS NC VDD DQA DQA VDDQ VSS DQA DQA DQA DQA VSS VDDQ DQA DQA NC NC DQC DQC VDDQ VSS DQC DQC DQC DQC VSS VDDQ DQC DQC NC VDD NC VSS DQD DQD VDDQ VSS DQD DQD DQD DQD VSS V...

Page 3: ...e allowed to behave as outputs When deasserted HIGH I O pins are three stated and act as input data pins OE is masked during the data portion of a Write sequence during the first clock when emerging f...

Page 4: ...n incremented sufficiently A HIGH input on ADV LD will increment the internal burst counter regardless of the state of chip enable inputs or WE WE is latched at the beginning of a burst cycle Therefor...

Page 5: ...t X X X L H X X L L L H Data Out Q NOP DUMMY READ Begin Burst External L H L L L H X H L L H Three State DUMMY READ Continue Burst Next X X X L H X X H L L H Three State WRITE Cycle Begin Burst Extern...

Page 6: ...12 Truth Table for Read Write 2 3 Function WE BWA BWB BWC BWD Read H X X X X Write No Bytes Written L H H H H Write Byte A DQA L L H H H Write Byte B DQB L H L H H Write Byte C DQC L H H L H Write By...

Page 7: ...Current GND VI VDD Output Disabled 5 5 A IDD VDD Operating Supply Current VDD Max IOUT 0 mA f fMAX 1 tCYC 7 5 ns cycle 133 MHz 225 mA 10 ns cycle 100 MHz 205 mA ISB1 Automatic CE Power down Current T...

Page 8: ...2 0 ns tCENS CEN Set up before CLK Rise 1 5 2 0 ns tDS Data Input Set up before CLK Rise 1 5 2 0 ns tCES Chip Enable Set Up before CLK Rise 1 5 2 0 ns Notes 12 Timing reference level is 1 5V when VDD...

Page 9: ...n CE is HIGH CE1 is HIGH or CE2 is LOW or CE3 is HIGH 20 Order of the Burst sequence is determined by the status of the MODE 0 Linear 1 Interleaved Burst operations are optional Switching Characterist...

Page 10: ...133AXC A101 Lead Free 100 lead Thin Quad Flat Pack 14 x 20 x 1 4 mm Commercial CY7C1333H 133AXI A101 Lead Free 100 lead Thin Quad Flat Pack 14 x 20 x 1 4 mm Industrial 100 CY7C1333H 100AXC A101 Lead F...

Page 11: ...s written agreement with Cypress Furthermore Cypress does not authorize its products for use as critical components in life support systems where a malfunction or failure may reasonably be expected to...

Page 12: ...Page 12 of 12 Document History Page Document Title CY7C1333H 2 Mbit 64K x 32 Flow Through SRAM with NoBL Architecture Document Number 001 00209 REV ECN NO Issue Date Orig of Change Description of Chan...

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