Cypress Semiconductor CY14E108L Manual Download Page 15 | Manualshive

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ADVANCE

CY14E108L, CY14E108N

Document Number: 001-45524 Rev. *A

Page 15 of 20

Ordering Information

Speed

(ns)

Ordering Code

Package
Diagram

Package Type

Operating

Range

20

CY14E108L-ZS20XCT

51-85087

44-pin TSOP II

Commercial

CY14E108L-ZS20XIT

51-85087

44-pin TSOP II

Industrial

CY14E108L-ZS20XI

51-85087

44-pin TSOP II

CY14E108L-BA20XCT

51-85128

48-ball FBGA

Commercial

CY14E108L-BA20XIT

51-85128

48-ball FBGA

Industrial

CY14E108L-BA20XI

51-85128

48-ball FBGA

CY14E108L-ZSP20XCT

51-85160

54-pin TSOP II

Commercial

CY14E108L-ZSP20XIT

51-85160

54-pin TSOP II

Industrial

CY14E108L-ZSP20XI

51-85160

54-pin TSOP II

CY14E108N-BA20XCT

51-85128

48-ball FBGA

Commercial

CY14E108N-BA20XIT

51-85128

48-ball FBGA

Industrial

CY14E108N-BA20XI

51-85128

48-ball FBGA

CY14E108N-ZSP20XCT

51-85160

54-pin TSOP II

Commercial

CY14E108N-ZSP20XIT

51-85160

54-pin TSOP II

Industrial

CY14E108N-ZSP20XI

51-85160

54-pin TSOP II

25

CY14E108L-ZS25XCT

51-85087

44-pin TSOP II

Commercial

CY14E108L-ZS25XIT

51-85087

44-pin TSOP II

Industrial

CY14E108L-ZS25XI

51-85087

44-pin TSOP II

CY14E108L-BA25XIT

51-85128

48-ball FBGA

Industrial

CY14E108L-BA25XI

51-85128

48-ball FBGA

CY14E108N-BA25XCT

51-85128

48-ball FBGA

Commercial

CY14E108L-ZSP25XCT

51-85160

54-pin TSOP II

Commercial

CY14E108L-ZSP25XIT

51-85160

54-pin TSOP II

Industrial

CY14E108L-ZSP25XI

51-85160

54-pin TSOP II

CY14E108N-BA25XCT

51-85128

48-ball FBGA

Commercial

CY14E108N-BA25XIT

51-85128

48-ball FBGA

Industrial

CY14E108N-BA25XI

51-85128

48-ball FBGA

CY14E108N-ZSP25XCT

51-85160

54-pin TSOP II

Commercial

CY14E108N-ZSP25XIT

51-85160

54-pin TSOP II

Industrial

CY14E108N-ZSP25XI

51-85160

54-pin TSOP II

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Summary of Contents for CY14E108L

Page 1: ...ional Description The Cypress CY14E108L CY14E108N is a fast static RAM with a nonvolatile element in each memory cell The memory is organized as 1024K words of 8 bits each or 512K words of 16 bits eac...

Page 2: ...cale Top View x16 2 Note 2 Address expansion for 16 Mbit NC pin not connected to die NC A8 NC NC VSS DQ6 DQ5 DQ4 VCC A13 DQ3 A12 DQ2 DQ1 DQ0 OE A9 CE NC A0 A1 A2 A3 A4 A5 A6 A11 A7 A14 A15 A16 A17 A18...

Page 3: ...OW When LOW selects the chip When HIGH deselects the chip OE Input Output Enable Active LOW The active LOW OE input enables the data output buffers during read cycles IO pins are tri stated on deasser...

Page 4: ...y default on the CY14B108L CY14B108N During a normal operation the device draws current from VCC to charge a capacitor connected to the VCAP pin This stored charge is used by the chip to perform a sin...

Page 5: ...ransfer the data from the nonvolatile memory to the SRAM with a software address sequence A software RECALL cycle is initiated with a sequence of READ operations in a manner similar to the software ST...

Page 6: ...toStore Enable If the AutoStore function is disabled or re enabled a manual STORE operation hardware or software must be issued to save the AutoStore state through subsequent power down cycles The par...

Page 7: ...l 75 75 57 mA mA mA ICC2 Average VCC Current During STORE All Inputs Don t Care VCC Max Average current for duration tSTORE 12 mA ICC3 7 AverageVCC Currentat tRC 200 ns 5V 25 C typical WE VCC 0 2 All...

Page 8: ...Capacitance 14 pF Thermal Resistance In the following table the thermal resistance parameters are listed 9 Parameter Description Test Conditions 48 FBGA 44 TSOP II 54 TSOP II Unit JA Thermal Resistan...

Page 9: ...0 0 ns tPD 10 tPS Chip Disable to Power Standby 20 25 45 ns tDBE Byte Enable to Data Valid 10 12 20 ns tLZBE Byte Enable to Output Active 0 0 0 ns tHZBE Byte Disable to Output Inactive 8 10 15 ns SRAM...

Page 10: ...allowed to complete SRAM cycle 1 70 s tHLHX Hardware STORE pulse width 15 ns Switching Waveforms Figure 5 SRAM Read Cycle 1 Address Controlled 10 11 21 tRC tAA tOHA ADDRESS DQ DATA OUT DATA VALID Note...

Page 11: ...orms continued ADDRESS tRC CE tACE tLZCE tPD tHZCE OE tDOE tLZOE DATA VALID ACTIVE STANDBY tPU DQ DATA OUT ICC tLZBE tDBE tHZBE HZOE t tHZCE BHE BLE tWC tSCE tHA tAW tSA tPWE tSD tHD tHZWE tLZWE ADDRE...

Page 12: ...are ignored during STORE RECALL and while VCC is below VSWITCH Switching Waveforms continued tWC ADDRESS tSA tSCE tHA tAW tPWE tSD tHD CE WE DATA IN DATA OUT HIGH IMPEDANCE DATA VALID BHE BLE tBW VCC...

Page 13: ...CE Controlled Software STORE RECALL Cycle 17 Figure 11 OE Controlled Software STORE RECALL Cycle 17 Switching Waveforms continued tRC tRC ADDRESS 1 ADDRESS 6 ADDRESS tAS tCW tGHAX tSTORE tRECALL DATA...

Page 14: ...ADVANCE CY14E108L CY14E108N Document Number 001 45524 Rev A Page 14 of 20 Figure 12 Hardware STORE Cycle 20 Figure 13 Soft Sequence Processing 18 19 Switching Waveforms continued tSS tSS Feedback...

Page 15: ...20XI 51 85128 48 ball FBGA CY14E108N ZSP20XCT 51 85160 54 pin TSOP II Commercial CY14E108N ZSP20XIT 51 85160 54 pin TSOP II Industrial CY14E108N ZSP20XI 51 85160 54 pin TSOP II 25 CY14E108L ZS25XCT 51...

Page 16: ...5XIT 51 85128 48 ball FBGA Industrial CY14E108N BA45XI 51 85128 48 ball FBGA CY14E108N ZSP45XCT 51 85160 54 pin TSOP II Commercial CY14E108N ZSP45XIT 51 85160 54 pin TSOP II Industrial CY14E108N ZSP45...

Page 17: ...70 PLANE SEATING PIN 1 I D 44 1 18 517 0 729 0 800 BSC 0 5 0 400 0 016 0 300 0 012 EJECTOR PIN R G O K E A X S 11 735 0 462 10 058 0 396 10 262 0 404 1 194 0 047 0 991 0 039 0 150 0 0059 0 050 0 0020...

Page 18: ...kage Diagrams continued A 1 A1 CORNER 0 75 0 75 0 30 0 05 48X 0 25 M C A B 0 05 M C B A 0 15 4X 0 21 0 05 1 20 MAX C SEATING PLANE 0 53 0 05 0 25 C 0 15 C A1 CORNER TOP VIEW BOTTOM VIEW 2 3 4 3 75 5 2...

Page 19: ...ADVANCE CY14E108L CY14E108N Document Number 001 45524 Rev A Page 19 of 20 Figure 16 54 Pin TSOP II 51 85160 Package Diagrams continued 51 85160 Feedback...

Page 20: ...de except as specified above is prohibited without the express written permission of Cypress Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND EXPRESS OR IMPLIED WITH REGARD TO THIS MATERIAL INCLUDING...

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