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GTS/DEC/003

7

4 Apr. 2019 | DST/W/132

CURTISSWRIGHTDS.COM 

Figure 3: J1 and J2 selection headers

N

OTE

:  

The J2 selection header is not used on the GTS/DEC/003.

SMART_OUT output

The GTS/DEC/003 has a programmable output which can output one of the following signals when selected.   

Figure 4: Minor frame pulse and sync word found pulse signals

PINS

DESCRIPTION

1

Connects a 50Ω load between the + input and GND for single ended input (default).

2

Connects a 75Ω load between the + input and GND for single ended input.

3

Connects the - input to GND for single ended input (default).

4

Connects a 120Ω load between the + input and the - input for differential ended signals.

TABLE 10

 Programmable output signals

SELECTED OUTPUT

DESCRIPTION

Minor frame pulse

High for last bit in sync word for at least 4 to 16 bits in frame (per decom channel).

Sync word found pulse

High for last bit in sync word location for at least 4 to 16 bits in frame (per decom channel).

Word pulse

High for last bit in word (per decom channel).

1 PPS pulse from IRIG_B time

Width of 1 PPS pulse is 16ns (high for 16ns every second).

Shunts at pins 
1 and 3 (default)

Single ended input
(50Ω termination)

Single ended input
(75Ω termination)

Differential ended input
(120Ω termination)

1

2

3

4

Place shunts at 
pins 2 and 3

Place shunt at pin 4

J1 header

J2 header

Sync word

First word
in frame

1 bit

1 bit

Last word
in frame

Second word
in frame

PCM data

Minor frame pulse/sync word found pulse

4 to 16 bits

Summary of Contents for GTS/DEC/003

Page 1: ...gital IRIG B 000 001 002 003 time formats Applications Real time ground stations Telemetry data links Overview The GTS DEC 003 reconstructs a serial PCM data stream from a source that has been corrupted by noise phase jitter amplitude modulation or base line variations The all digital design utilizes one independent programmable matched filter and Phase Locked Loop PLL to track deviations in the b...

Page 2: ... W Environmental ratings operating temperature 10 50 C storage temperature 25 70 C TABLE 2 BTTL inputs PARAMETER MIN TYP MAX UNITS CONDITION DETAILS Inputs 3 Signaling rate PCM_IN_DCLK 0 20 Mbps PCM_IN_DATA 0 20 Mbps NRZ L M S RNRZ L 11 13 15 17 23 PCM_IN_DATA 0 10 Mbps BIØ L IRIG B_IN 1 Mbps Digital IRIG B 000 001 002 003 time formats Input voltage operating range 0 5 5 V logic 0 0 8 V logic 1 2 ...

Page 3: ... powered on each input to GND 69 kΩ Module powered off TABLE 4 RS 422 outputs PARAMETER MIN TYP MAX UNITS CONDITION DETAILS Outputs 5 Signaling rate BITSYNC_OUT_DATA 0 20 Mbps NRZ L M S RNRZ L 11 13 15 17 23 BITSYNC_OUT_DATA 0 10 Mbps BIØ L BITSYNC_OUT_DCLK 0 20 MHz Output voltage absolute operating range 7 12 V Absolute voltage of the operating signal must stay within this range logic 0 3 V V0 V0...

Page 4: ... rate NRZ L M S RNRZ L 11 13 15 17 23 0 0128 20 000 kbps BIØ L 0 064 10 000 kbps Maximum DC offset single ended 5 5 V differential ended 10 10 V TABLE 6 Bit synchronizer performance PARAMETER MIN TYP MAX UNITS CONDITION DETAILS Loop bandwidth 0 01 2 0 Offset bandwidth 100 Gain bandwidth 100 Acquisition range 0 04 5 Tracking range 0 1 20 Bit Error Rate 0 2 1 dB Deviation from theory Sync maintenanc...

Page 5: ...s setting controls how quickly the automatic offset control responds to a change in offset a higher setting up to 100 results in a slower filter response while a smaller setting say 20 results in a faster response Loop bandwidth filter It is desirable to restrict loop bandwidth at higher bit rates This is to prevent the PLL frequency from moving too far away from the PCM clock frequency and thereb...

Page 6: ...power on and the first driver access to the PCI card Once the card is config ured behavior is as shown in the following table until the PC is powered off Figure 2 PCI card LEDs J1 and J2 headers The following figure shows the selection headers on the GTS DEC 003 card J1 is used for PCM_IN_ANALOG 0 and J2 is used for PCM_IN_ANALOG 1 TABLE 9 Status LED description LED NAME DESCRIPTION 1 IRIG B Light...

Page 7: ...or differential ended signals TABLE 10 Programmable output signals SELECTED OUTPUT DESCRIPTION Minor frame pulse High for last bit in sync word for at least 4 to 16 bits in frame per decom channel Sync word found pulse High for last bit in sync word location for at least 4 to 16 bits in frame per decom channel Word pulse High for last bit in word per decom channel 1 PPS pulse from IRIG_B time Widt...

Page 8: ...he number of bits 0 63 that can be incorrect and the sync word is still considered a match Matches to lock The number of valid sync words 1 16 required after loss before the data is considered valid Misses to loss The number of sync words 1 16 which fail the match tolerance before data is considered invalid ...

Page 9: ...chronizer clock output for channel 0 24 BITSYNC_OUT_DCLK 0 RS 422 outputs Differential ended bit synchronizer clock output for channel 0 25 BITSYNC_OUT_DATA 0 RS 422 outputs Differential ended bit synchronizer data output for channel 0 26 BITSYNC_OUT_DATA 0 RS 422 outputs Differential ended bit synchronizer data output for channel 0 27 DNC Do not connect 28 DNC Do not connect 29 DNC Do not connect...

Page 10: ... items must be ordered separately refer to Related products for options Revision history Supporting software Related products Related documentation PART NUMBER DESCRIPTION GTS DEC 003 C Bit synchronizer and PCM decommutator PCI board 20Mbps 1ch REVISION DIFFERENCES STATUS GTS DEC 003 C First release Recommended for new programs SOFTWARE DETAILS GTS SDK 3 Software development kit for GTS boards Xid...

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