CANedge2 Docs, Release FW 01.04.02
• Bit-rate:
𝐵𝑅
=
𝐶𝐿𝐾/𝐵𝑅𝑃
𝑄
• Sample point:
𝑆𝑃
= 100
·
1+
𝑆𝐸𝐺
1
𝑄
Example: Matching bit-timing settings based on different input clock frequency (
CLK
).
Settings to match (based on a 80MHz input clock):
• Bit-rate: 2M
• Quanta: 40
• SEG1: 29
• SEG2: 10
• Sample point: 75%
Above settings are based on an input clock with frequency:
𝐶𝐿𝐾
=
𝐵𝑅
·
𝑄
= 2000000
·
40 = 80MHz
The CANedge uses a 40MHz input clock. To obtain a bit-rate of 2M with a 40MHz input clock, the
number of quanta is calculated as:
𝑄
=
𝐶𝐿𝐾/𝐵𝑅𝑃
𝐵𝑅
=
40000000
/
1
2000000
= 20
To obtain a sampling point of 75%, SEG1 is calcualted as:
𝑆𝐸𝐺
1
=
𝑆𝑃
·
𝑄
100
−
1 =
75
·
20
100
= 14
Now, SEG2 is calculated as:
𝑆𝐸𝐺
2
=
𝑄
−
𝑆𝐸𝐺
1
−
1 = 20
−
14
−
1 = 5
The equivalent bit-timing settings using the 40 MHz input clock of the CANedge becomes:
• BRP: 1
• SEG1: 14
• SEG2: 5
0.4.5.3 Filter
This page documents the
filter
configuration
Configuration file fields
This section is autogenerated from the Rule Schema file.
Receive filters ‘‘ ‘‘
Filter remote request frames
properties.remote_frames
Controls if remote request frames are forwarded to the message filters. If ‘Reject‘ is selected, remote
request frames are discarded before they reach the message filters.
type:
integer
default:
0
options:
Reject: [0] Accept: [1]
24
CONTENTS
