8
CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
8
8
1nf
5.1K
CLAMP
OUT
GATE DRIVER
100
DESAT
3.3V
J5/J6
Figure 4. Gate Drive shown with Miller Clamp and short circuit protection.
In a half bridge configuration, turning on one device tends to induce a voltage on the opposing
device gate node. If this voltage exceeds the threshold voltage it is possible to get an unintended
shoot through event in certain devices. A negative gate bias (Bi-polar drive) is one common way to
mitigate this issue. When using a uni-polar drive sometimes it is common to use a Miller clamp to
ensure that the gate voltage of the opposing device is clamped below the threshold voltage. To
activate the Miller clamp, a jumper (JM5=upper channel, JM6=lower channel) needs to be shorted.
The Miller clamp should only be enabled when the gate driver is configured for +15V/0V output
voltage.
Although we provide this feature on the board for the user to evaluate the effects of the Miller
clamp, it is not necessary to have a Miller clamp. The SiC MOSFET channel is not fully turned ON
when the gate voltage exceeds the device threshold voltage. For Cree SiC MOSFETs, the gate voltage
would have to exceed 9V to have a significant shoot through event.
2.1 Cooling
CAUTION
IT IS NOT NECESSARY FOR YOU TO TOUCH THE BOARD WHILE IT IS ENERGIZED. WHEN DEVICES
ARE BEING ATTACHED FOR TESTING, THE BOARD MUST BE DISCONNECTED FROM THE
ELECTRICAL SOURCE AND ALL BULK CAPACITORS MUST BE FULLY DISCHARGED.
SOME COMPONENTS ON THE BOARD REACH TEMPERATURES ABOVE 50˚ CELSIUS. THESE
