5
CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
1.
Introduction
The purpose of this evaluation board is to demonstrate the high-switching performance of Cree 3
rd
Generation Silicon Carbide (SiC) Metal Oxide Semiconductor Field-Effect Transistors (MOSFETs) in a
7L D2PAK package. The new surface-mount device (SMD), specifically designed for high voltage
MOSFETs, has a small footprint with a wide creepage distance of 7mm between drain and source.
The new package also includes a separate driver source connection, which reduces gate ringing and
provides clean gate signals. This evaluation board (Figure 1) comes configured as a basic half bridge
circuit with two C3M0120090J SiC MOSFETs installed. The board can easily be configured into
common power conversion topologies such as synchronous boost, synchronous buck, Inverter, and
other topologies. This board was designed to make it easy for the user to:
Evaluate SiC MOSFET switching performance in a 7L D2PAK package to characterize E
ON
and
E
OFF
losses.
Evaluate thermal performance. The integrated heatsink is predrilled with a blind hole on
the backside for thermocouples so the heatsink surface temperature can be accurately
estimated.
Serve as a PC board layout example for driving Gen 3 SiC MOSFETs in the newly developed
7L D2PAK package.
Easily evaluate the effects of different Rg values, Miller clamps, uni-polar versus bipolar gate
drive, fault detection circuit, various thermal interface materials, and cooling methods.
Figure 1. Evaluation Board (top and side view)
2.
Features
The evaluation board’s physical dimensions are 127mm x 98mm x 58mm. The board comes
preassembled with an isolated heatsink, cooling fan, and 2 SiC MOSFETS. The heatsink is attached
to the board with five nonconductive screws (RENY hexagon socket low head cap bolt M5 6mm)
.
