6. BIOS Setup
54
SPI-8150-LVA, SPI-8151-LVA
6.4. Chipset Features Setup
Phoenix - AwardBIOS CMOS Setup Utility
Advanced Chipset Features
→
→
→
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: Move Enter : Select +/-/PU/PD : Value F10 : Save ESC : Exit F1 : General Help
F5 : Previous Values F6 : Fail-Safe Defaults F7 : Optimized Defaults
SDRAM CAS Latency Time
SDRAM Cycle Time Tras/Trc
SDRAM RAS-to-CAS Deley
SDRAM RAS Precharge Time
System BIOS Cacheable
Video BIOS Cacheable
Memory Hole At 15M-16M
CPU Latency Timer
Delay Transaction
AGP Graphic Aperture Size
Power Supply Type
On Chip Video Windows Size
[3]
[Auto]
[Auto]
[Auto]
[Disabled]
[Disabled]
[Disabled]
[Enabled]
[Enabled]
[64MB]
[AT]
[64MB]
Item Help
Menu Level1 >
This section allows you to configure the system based on the specific features of the
installed chipset. This chipset manages bus speeds and access to system memory resources,
such as DRAM and the external cache. It also coordinates communications between the
conventional ISA bus and the PCI bus. It must be stated that these items should never need to
be altered. The default settings have been chosen because they provide the best operating
conditions for your system. The only time you might consider making any changes would be
if you discovered that data was being lost while using your system.
