6 BIOS Setup
52
SIS-8601-LVA
6.6. Advanced Chipset Features Setup
This section allows you to configure the system based on the specific features of the installed
chipset. This chipset manages bus speeds and access to system memory resources, such as
DRAM and the external cache. It also coordinates communications between the conventional
ISA bus and the PCI bus. It must be stated that these items should never need to be altered. The
default settings have been chosen because they provide the best operating conditions for your
system. The only time you might consider making any changes would be if you discovered that
data was being lost while using your system.
Phoenix – AwardBIOS CMOS Setup Utility
Advanced Chipset Features
Item Help
DRAM Clock
DRAM Timing By SPD
x SDRAM Cycle Length
x Bank Interleave
Memory Hole
System BIOS Cacheable
Video RAM Cacheable
OnChip USB
USB Keyboard Support
USB Mouse Support
On Chip Sound
Suspend LED BLINK
Select Display Device
[Host CLK]
[Enabled]
3
Disabled
[Enabled]
[Disabled]
[Disabled]
[Enabled]
[Disabled]
[Disabled]
[Enabled]
[Disable]
[CRT]
Menu Level >
DRAM Settings
The first chipset settings deal with CPU access to dynamic random access memory
(DRAM). The default timings have been carefully chosen and should only be altered if data is
being lost.
Summary of Contents for SIS-8601-LVA
Page 15: ...1 Introduction 8 SIS 8601 LVA...
Page 37: ...3 Jumper Setting 30 SIS 8601 LVA...
Page 41: ...4 CPU card Resources 34 SIS 8601 LVA...
Page 89: ...6 BIOS Setup 82 SIS 8601 LVA...
