52
EmCORE-i612VLS/C400 User's Manual
CODE
DESCRIPTION OF CHECK
CFh
Test CMOS R/W functionality.
C0h
Early chipset initialization:
-Disable shadow RAM
-Disable L2 cache (socket 7 or below)
-Program basic chipset registers
C1h
Detect memory
-Auto-detection of DRAM size, type and ECC.
-Auto-detection of L2 cache (socket 7 or below)
C3h
Expand compressed BIOS code to DRAM
C5h
Call chipset hook to copy BIOS back to E000 & F000
shadow RAM.
0h1
Expand the Xgroup codes locating in physical address 1000:0
02h
Reserved
03h
Initial Superio_Early_Init switch.
04h
Reserved
05h
1. Blank out screen
2. Clear CMOS error flag
06h
Reserved
07h
1. Clear 8042 interface
2. Initialize 8042 self-test
08h
1. Test special keyboard controller for Winbond 977
series Super I/O chips.
2. Enable keyboard interface.
09h
Reserved
0Ah
1. Disable PS/2 mouse interface (optional).
2. Auto detect ports for keyboard & mouse followed by a
port & interface swap (optional).
3. Reset keyboard for Winbond 977 series Super I/O chips.
0Bh
Reserved
0Ch
Reserved
POST Codes
The following codes are not displayed on the screen. They can only be
viewed on the LED display of a so called POST card. The codes are listened
in the same order as the according functions are executed at PC startup. If
you have access to a POST Card reader, you can watch the system perform
each test by the value that's displayed. If the system hangs (if there's a
problem) the last value displayed will give you a good idea where and what
went wrong, or what's bad on the system board.
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