41
EmCORE-i612VLS/C400 User's Manual
SDRAM RAS Precharge Time
If an insufficient number of cycles is allowed for the RAS to accumulate its
charge before DRAM refresh, the refresh may be incomplete and the DRAM
may fail to retain data. Fast gives faster performance; and Slow givesmore
stable performance. This field applies only when synchronous DRAM is
installed in the system.
System BIOS Cacheable
Selecting Enabled allows caching of the system BIOS ROM at F0000h-FFFFFh,
resulting in better system performance. However, if any program writes to
this memory area, a system error may result.
Video BIOS Cacheable
Select Enabled allows caching of the video BIOS, resulting in better system
performance. However, if any program writes to this memory area, a system
error may result.
CPU latency Timer
When enabled this item, the CPU cycle will only be deferred after it has been
held in a "Snoop Stall" for 31 clocks and another ADS# has arrived. W hen
disabled, the CPU cycle will be deferred immediatedly after the GMCH
receives another ADS#.
Delayed Transaction
The chipset has an embedded 32-bit posted write buffer to support delay
transactions cycles. Select Enabled to support compliance with PCI specifica-
tion version 2.1
AGP Graphics Aperture Size
This fielf determines the effective size of the Graphic Aperture used for a
particular GMCH configuration. It can be updated by the GMCH-specific BIOS
configuration sequence before the PCI standard bus enumeration sequence
takes place. If it is not updated then a default value will select an aperture of
maximum size.
Display Cache Frequency
You can use this item to select the frequency of the display cache.
System Memory Frequency
You can use this item to select the operating frequency for the main system.
StockCheck.com
