Section 2.3 - Electrical Interface and Connectors.Pin Description
Version 1.3 - 2009-12
11
Pin Nr
J2
J3
J6
J8 Pin Name
Signal Name
Signal
Level
Type
Description
- 19 1 -
RESET
Hardware reset
CMOS
In/Out
Active low. Must be open drain
collector.
See section 2.5 for design examples.
* All signals are logic level UART signals (typically 0 / 3VDC)