Congatec Qseven conga-QA6 015033 User Manual Download Page 68

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2010

congatec

QTOPm14

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Feature

Options

Description

Reserved Interrupt 2

None

IRQ3
IRQ4
IRQ6
IRQ7
IRQ10
IRQ11
IRQ14
IRQ15

Reserves additional IRQ for custom purposes.

PIRQ Routing

submenu

Extended Tag

Disabled

Enabled

Allows device to use 8-bit tag field as a requester.

No Snoop

Disabled

Enabled

Enables or Disables PCI Express Device no snoop option.

Maximum Payload

Auto

, 128, 256, 512,

1024, 2048, 4096

Sets the maximum payload value on bytes or allows the system BIOS to select the value.

Maximum Read Request

Auto

, 128, 256, 512,

1024, 2048, 4096

Sets the maximum read request value on bytes or allows the system BIOS to select the value.

Automatic ASPM

Disabled

Enabled

Enables or disables ASPM on reported capabilities and known issues.

Extended Synch

Disabled

Enabled

Enables or disables the generation of extended synchronization patterns.

10.5.4

PCI Express Ports 1-4 Configuration Submenu

Feature

Options

Description

PCI Express Root Port 0..3

Disabled

Enabled

Controls the PCI Express Root port.

10.5.5

PIRQ Routing Submenu

Feature

Options

Description

PIRQA...H

Auto

IRQ3
IRQ4
IRQ6
IRQ7
IRQ10
IRQ11
IRQ14
IRQ15

Sets Interrupt for selected PIRQ. Refer to the board’s Resource List for a detailed description of devices
connected to the respective PIRQ.

This setup node is only effective while operating in PIC (non IOAPIC) interrupt mode.

Summary of Contents for Qseven conga-QA6 015033

Page 2: ...4 4 Serial ATA SATA about AHCI support only Added section 6 5 Important Information Updated section 9 BIOS Setup Description 1 1 2012 07 13 GDA Updated section 9 BIOS Setup Description 1 2 2012 11 06...

Page 3: ...tly from any technical or typographical errors or omissions contained herein or for discrepancies between the product and the user s guide In no event shall congatec AG be liable for any incidental co...

Page 4: ...gatec AG All rights reserved All text pictures and graphics are protected by copyrights No copying is permitted without written permission from congatec AG congatec AG has made every attempt to ensure...

Page 5: ...non conforming product freight prepaid congatec AG will pay for transporting the repaired or exchanged product to the customer Repaired replaced or exchanged product will be warranted for the repair w...

Page 6: ...technical support department by email at support congatec com Terminology Term Description GB Gigabyte 1 073 741 824 bytes GHz Gigahertz one billion hertz kB Kilobyte 1024 bytes MB Megabyte 1 048 576...

Page 7: ...5 16 Power Management 29 5 17 I C Bus 29 5 18 Watchdog 30 5 19 Fan Control 30 6 Additional Features 31 6 1 congatec Board Controller cGB 31 6 2 Board Information 31 6 3 Watchdog 31 6 4 I2 C Bus 31 6...

Page 8: ...5 7 ACPI Configuration Submenu 69 10 5 8 CPU Configuration Submenu 71 10 5 9 Chipset Configuration Submenu 72 10 5 9 1 Network Settings Submenu 72 10 5 10 AHCI SATA Configuration 73 10 5 11 SDIO Confi...

Page 9: ...scriptions 48 Table 18 HDA AC 97 Signal Descriptions 49 Table 19 LVDS Signal Descriptions 49 Table 20 SDVO Signal Descriptions 50 Table 21 DisplayPort Signal Descriptions 51 Table 22 HDMI Signal Descr...

Page 10: ...rds in notebooks Carrier board designers can utilize as little or as many of the I O interfaces as deemed necessary The carrier board can therefore provide all the interface connectors required to att...

Page 11: ...MT s External PCI Express Lane s 3 3 3 3 Gigabit Ethernet Yes Yes Yes Yes Onboard Solid State Drive SSD No No No No CAN Bus Yes Yes Yes Yes CPU TDP 3 9 W 3 6 W 3 6 W 2 7 W Part No 015042 015046 01504...

Page 12: ...7 Processor Intel Atom E680T 1 6GHz Intel Atom E620T 600 MHz L2 Cache 512kB 512kB Onboard Memory 2GB DDR2 800 MT s 1GB DDR2 667 MT s External PCI Express Lane s 3 3 Gigabit Ethernet Yes Yes Onboard So...

Page 13: ...rface integrated 80 MHz LVDS Transmitter Supports 1x18 and 1x24 bit TFT configurations Automatic Panel Detection via EPI Embedded Panel Interface based on VESA EDID 1 3 Resolutions 640x480 up to 1280x...

Page 14: ...possible that some legacy DOS based applications will not function properly when used in conjunction with the conga QA6 This limitation is due to the EG20T PCH architecture which is not designed for l...

Page 15: ...e 5 4 75 5 00 5 25 Vdc Ripple 50 mVPP 0 20MHz Current 5V_SB Voltage 5 4 75 5 00 5 25 Vdc Ripple 50 mVPP 2 4 2 Rise Time The input voltages shall rise from 10 of nominal to 90 of nominal at a minimum s...

Page 16: ...st frequency mode LFM with minimum core voltage during desktop idle The CPU was stressed to its maximum frequency S0 Maximum value Highest frequency mode HFM Turbo Boost The CPU was stressed to its ma...

Page 17: ...1 0 6 GHz 0 96 1 09 1 24 0 12 Note With fast input voltage rise time the inrush current may exceed the measured peak current 2 6 Supply Voltage Battery Power Table 7 CMOS Battery Power Consumption RTC...

Page 18: ...OS battery present when operating the conga MA5 2 7 Environmental Specifications The above operating temperatures must be strictly adhered to at all times When using a congatec heatspreader the maximu...

Page 19: ...Control Power Management and Control Signals Gbit Ethernet SM Bus SPI 1x SDIO MMC CAN Bus PCIe Port 0 3 PCIe Lanes Ports 1 2 3 Memory Bus 533MHz or 800MHz Onboard DDR2 Maximum 2GB Micrel Gbit Ethernet...

Page 20: ...n industrial temperature ranges 40 to 85 C use of the conga QA6 heatspreaders is not recommended by congatec and furthermore its use is at the risk of the end user It is the responsibility of the end...

Page 21: ...found on the conga QA is connected directly to the ground plane when mounted in the conga QEVAL evaluation carrier board For more information about connecting the conga QA s PCB cooling plate to the...

Page 22: ...c AG QTOPm14 22 80 4 2 Heatspreader and Aluminum Standoff Exploded View Note Torque specification for heatspreader screws is 0 3 Nm Heatspreader utilizes micro pins to ensure that the thermal stacks a...

Page 23: ...t mate with the 230 pin card edge MXM connector located on the carrier board This connector provides the ability to interface the available signals of the conga QA6 with the carrier board peripherals...

Page 24: ...m Controller Hub EG20T provides the conga QA6 with a Gigabit Ethernet Media Access Controller GbE MAC that is connected to a Micrel KSZ9021RN I Phy The Ethernet interface consists of 4 pairs of low vo...

Page 25: ...C expansion port used to communicate with a variety of SDIO and MMC devices This port is available externally and supports SDIO Revision 1 1 and MMC Revision 4 1 and is backward compatible with previo...

Page 26: ...5 MHz Y Y 640x480 75 Hz 30 75 MHz Y Y 800x600 50 Hz 30 75 MHz Y Y 848x480 60 Hz 31 5 MHz Y Y 640x480 85 Hz 35 MHz Y Y 800x600RB 60 Hz 35 5 MHz Y Y 800x600 60 Hz 38 25 MHz Y Y 848x480 75 Hz 41 MHz Y Y...

Page 27: ...patible with the single link Digital Visual Interface DVI carrying digital video Note The conga QA6 does not offer a HDMI interface 5 12 LPC conga QA6 offers the LPC Low Pin Count bus through the use...

Page 28: ...l Through the use of an internal monitor on the 5V input voltage and or the internal power supplies the conga QA6 module is capable of generating its own power on good The conga QA6 provides support f...

Page 29: ...observe the power supply rise waveform through the use of an oscilloscope to determine if the rise is indeed monotonic and does not have any dips This should be done during the power supply qualificat...

Page 30: ...ional signals and functions to further improve system management One of these signals is an output signal called FAN_PWMOUT that allows system fan control using a PWM Pulse Width Modulation Output Add...

Page 31: ...runtime meter and boot counter 6 3 Watchdog The conga QA6 is equipped with a multi stage watchdog solution that is triggered by software The COM Express Specification does not provide support for exte...

Page 32: ...code to the BIOS POST process Except for custom specific code this feature can also be used to support Win XP SLP installation Window 7 SLIC table verb tables for HDA codecs rare graphic modes and Sup...

Page 33: ...easy Customers have to change their application software when switching to another COM vendor EAPI Embedded Application Programming Interface is a programming interface defined by the PICMG that addre...

Page 34: ...on the blocks the SSD endurance will increase or decrease according to the amount of used and unused SSD space 3 Given the information in parameters 1 and 2 if the SSD application is a 24 7 continuou...

Page 35: ...ate the TCC cannot be configured by the user nor is it software visible The Thermal Monitor can control the processor temperature through the use of two different methods defined as TM1 and TM2 TM1 me...

Page 36: ...tel Virtualization Technology can improve the performance and robustness of today s software only virtual machine solutions Intel VT is a multi generational series of extensions to Intel processor and...

Page 37: ...fan on off Although active cooling devices consume power and produce noise they also have the ability to cool the thermal zone without having to reduce the overall system performance Use the active co...

Page 38: ...d to Disk is not supported by the BIOS S4_BIOS but it is supported by some operating systems S4_OS Hibernate Check with the operating system vendor to determine if S4 Suspend to Disk is supported This...

Page 39: ...pliant devices congatec has implemented a USB 2 0 hub on the conga QA6 that provides two additional ports for a total of 8 See conga QA6 USB Routing Diagram on the following page Routing Diagram EHCI...

Page 40: ...featured on the conga QA6 as well as the module itself These limitation are documented in a conga QA6 Fact Sheet For information about the conga QA6 Fact Sheet contact your local congatec representati...

Page 41: ...to determine the options available on the module Table 10 Signal Tables Terminology Descriptions Term Description I Input Pin O Output Pin OC Open Collector OD Open Drain PP Push Pull I O Bi direction...

Page 42: ...ATA_ACT Serial ATA Activity 34 GND Power Ground 35 SATA0_RX Serial ATA Channel 0 RX 36 SATA1_RX Serial ATA Channel 1 RX 37 SATA0_RX Serial ATA Channel 0 RX 38 SATA1_RX Serial ATA Channel 1 RX 39 GND P...

Page 43: ...ndary channel 2 109 LVDS_A2 LVDS Primary channel 2 110 LVDS_B2 LVDS Secondary channel 2 111 LVDS_PPEN LVDS Power enable 112 LVDS_BLEN LVDS Backlight enable 113 LVDS_A3 LVDS Primary channel 3 114 LVDS_...

Page 44: ...ound 184 GND Power Ground 185 LPC_AD0 LPC Interface Address Data 0 186 LPC_AD1 LPC Interface Address Data 1 187 LPC_AD2 LPC Interface Address Data 0 188 LPC_AD3 LPC Interface Address Data 3 189 LPC_CL...

Page 45: ...erential pair I PCIE Supports PCI Express Base Specification Revision 1 0a PCIE2_TX PCIE2_TX 167 169 PCI Express channel 2 Transmit Output differential pair O PCIE Supports PCI Express Base Specificat...

Page 46: ...ternal transformer GBE_CTREF 15 Reference voltage for carrier board Ethernet channel 0 magnetics center tap The reference voltage is determined by the requirements of the module s PHY and may be as lo...

Page 47: ...al Serial Bus Port 1 differential pair If USB_ID is LOW default USB Host If USB_ID is tied HIGH USB device Client I O If USB_ID is LOW default USB 2 0 compliant Host Backwards compatible to USB 1 1 If...

Page 48: ...vel shifter protection circuitry should be implemented on the carrier board for this signal I 3 3V PU 10k 3 3V Table 17 SDIO Signal Descriptions Signal Pin Description I O PU PD Comment SDIO_CD 43 SDI...

Page 49: ...nel backlight brightness via pulse width modulation PWM When not in use for this primary purpose it can be used as General Purpose PWM Output O 3 3V LVDS_A0 LVDS_A0 99 101 LVDS primary channel differe...

Page 50: ...37 139 SDVO differential pair green data lines O PCIE SDVO_BLUE SDVO_BLUE 143 145 SDVO differential pair blue data lines O PCIE SDVO_RED SDVO_RED 149 151 SDVO differential pair red data lines O PCIE S...

Page 51: ...the signals for the SDVO interface and or the TMDS interface DisplayPort interface is not supported on the conga QA6 Table 22 HDMI Signal Descriptions Signal Pin Description I O PU PD Comment TMDS_CL...

Page 52: ...ion I O PU PD Comment SPI_MOSI 199 Master serial output Slave serial input signal SPI serial output data from Qseven module to the SPI device O 3 3V SPI_MISO 201 Master serial input Slave serial outpu...

Page 53: ...ow by an external circuitry to reset the Qseven module I 3 3V PU 10k 3 3V BATLOW 27 Battery low input This signal may be driven active low by external circuitry to signal that the system battery is lo...

Page 54: ...line of System Management Bus I O 3 3VSB OD PU 10k 3 3VSB SMB_DAT 62 Data line of System Management Bus I O 3 3VSB OD PU 10k 3 3VSB SMB_ALERT 64 System Management Bus Alert input This signal may be dr...

Page 55: ...as JTAG_TMS signal for boundary scan purposes during production May also be used via a multiplexer as vendor specific BOOT signal for firmware and boot loader implementations In this case the multipl...

Page 56: ...es active the system immediately transitions to the S5 State Soft Off O 3 3VSB Table 32 Fan Control Signal Descriptions Signal Pin Description I O PU PD Comment FAN_PWMOUT GP_PWM_OUT1 196 Primary func...

Page 57: ...ive low O 2 5VSB PU 4k99 2 5VSB GBE0_ACT is a bootstrap signal see note below Caution The signals listed in the table above are used as chipset configuration straps during system reset In this conditi...

Page 58: ...PCIe bus via MSI 7 Yes LPC bus via SERIRQ or PCIe bus via MSI 8 No Real time Clock Not applicable 9 Note SCI Generic LPC bus via SERIRQ or PCIe bus via MSI 10 Yes LPC bus via SERIRQ or PCIe bus via MS...

Page 59: ...bus via SERIRQ option for SCI 10 Yes LPC bus via SERIRQ 11 Yes LPC bus via SERIRQ 12 No LPC bus via SERIRQ Exclusively 13 No Math processor Not applicable 14 Yes LPC bus via SERIRQ 15 Yes LPC bus via...

Page 60: ...et Hub Control 02h 00h 01h Internal Gigabit Ethernet MAC 02h 00h 02h Internal GPIO 02h 02h 00h Internal USB 2 0 OHCI Host 1 02h 02h 01h Internal USB 2 0 OHCI Host 1 02h 02h 02h Internal USB 2 0 OHCI H...

Page 61: ...e Root Port 1 PCIe Root Port 2 PCIe Root Port 3 A INTA 16 x x x x 2 x 3 x 4 x 5 x x x x B INTB 17 x 3 x 4 x 5 x 2 C INTC 18 x 4 x 5 x 2 x 3 D INTD 19 x 5 x 2 x 3 x 4 E 20 F 21 G 22 H 23 Note 2 Interru...

Page 62: ...owing the operator to choose the boot device to be used 10 2 Setup Menu and Navigation The congatec BIOS setup screen is composed of the menu bar and two main frames The menu bar is shown below Main A...

Page 63: ...n BIOS ID no option Displays the BIOS ID OEM BIOS Version no option Displays the OEM BIOS ID Build Date no option Displays the date when the BIOS was built Product Revision no option Displays the hard...

Page 64: ...PUNIT Build Time no option Displays the PUNIT build time 10 5 Advanced Setup Select the Advanced tab from the setup menu to enter the Advanced BIOS Setup screen The menu is used for setting advanced f...

Page 65: ...0x480 1x18 013h WVGA 800x480 1x24 01Bh SVGA 800x600 1x18 01Ah XGA 1024x768 1x18 006h XGA 1024x768 1x18 008h Customized EDID 1 Customized EDID 2 Customized EDID 3 Select a predefined LFP type or choose...

Page 66: ...the popup boot selection menu or while waiting for setup password insertion Runtime Watchdog Disabled One time trigger Single Event Repeated Event Selects the operating mode of the runtime watchdog Th...

Page 67: ...PCI ROM Priority EFI Compatible ROM Legacy ROM In case of multiple Option ROMS specifies what Option ROM is to be launched Launch PXE OpROM Disabled Enabled Allows the launching of PXE Option ROMS La...

Page 68: ...read request value on bytes or allows the system BIOS to select the value Automatic ASPM Disabled Enabled Enables or disables ASPM on reported capabilities and known issues Extended Synch Disabled En...

Page 69: ...Point 70 80 90 95 100 105 110 115 120 125 C Disabled Specifies the temperature threshold at which the ACPI aware OS performs a critical shutdown Active Trip Point Disabled 30 40 50 60 70 80 90 95 100...

Page 70: ...are three check boxes that define what Windows will do when a fatal error has been detected In order to ensure that the system restarts after a Watchdog ACPI Event that is set to Restart you must make...

Page 71: ...e maximum CPUID input value to 03h when queried even if the processor supports a higher CPUID input value When disabled the processor will return the actual maximum CPUID input value of the processor...

Page 72: ...s Configures the Chip Power State of Ethernet PHY Disable S5 and Disable S3 S5 set the PHY on Power off mode saving energy during the system ACPI Power States S3 or S5 Enable Disabled always configure...

Page 73: ...pport The EHCI ownership change should be claimed by the EHCI OS driver Device Reset Timeout 10 sec 20 sec 30 sec 40 sec USB legacy mass storage device Start Unit command timeout Controller Timeout 1...

Page 74: ...only available if an external Winbond W83627 Super I O has been implemented on the carrier board 10 5 13 1 Serial Port 0 1 Configuration Submenu Feature Options Description Serial Port 0 Disabled Ena...

Page 75: ...Console Redirection submenu Only selectable when console redirection is enabled Serial Port for Out of Band Management Windows EMS no option Serial Port for Out of Band Management Windows Emergency Ma...

Page 76: ...low for error detection They can be used as an additional data bit Stop Bits 1 2 Stop bits indicate the end of a serial data packet A start bit indicates the beginning The standard setting is 1 stop b...

Page 77: ...boot menu can be started Boot Priority Selection Device Based Type Based Select between device and type based boot priority lists The Device Based boot priority list allows you to select from a list o...

Page 78: ...setup screen You can display the Save Exit screen option by highlighting it using the Arrow Keys 10 8 1 Save Exit Menu Feature Description Save Changes and Exit Exit setup menu after saving the chang...

Page 79: ...x where QTOP is the congatec internal BIOS project name for conga QA6 R is the identifier for a BIOS ROM file 1 is the so called feature number and xx is the major and minor revision number 11 1 Updat...

Page 80: ...pecification http www qseven standard org Qseven Design Guide http www qseven standard org Low Pin Count Interface Specification Revision 1 0 LPC http developer intel com design chipsets industry lpc...

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