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AG
TEVA2m11
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Table 43 SW11 - Super IO Configuration
Switch
Configuration Description
SW11.1
OFF
Configuration IO address 2Eh (default)
ON
Configuration IO address 4Eh
SW11.2
OFF
Super IO key selection 87h (default)
ON
Super IO key selection 88h
SW11.3
OFF
Disables Super IO Port 80 control (default)
ON
Enables Super IO Port 80 control
SW11.4
OFF
Selects eSPI_CS0# for Super IO in eSPI mode (default)
ON
Selects eSPI_CS1# for Super IO in eSPI mode
4.16
LPC/TPM Header
The LPC/eSPI interface from the module is also routed to connector X51. Connector X51—a 14-pin header—optionally supports TPM modules
that are compliant with the LPC specification (BOM option).
Use DIP SW10.2 to select LPC or eSPI mode. For description of the DIP SW10.2 settings, see table 15 “SW10.2 -LPC/eSPI Mode Control”.
Table 44 X51 - LPC/TPM Pinout Description
Pin Signals
Pin Signals
1
GND
2
LPC_FRAME#/ESPI_CS0#
3
LPC_CLK/ESPI_CLK
4
LPC_AD3/ESPI_IO3
5
KEY
6
LPC_AD2/ESPI_IO2
7
PLT_RST#
8
LPC_AD1/ESPI_IO1
9
VCC3V3
10
LPC_AD0/ESPI_IO0
11
SUS_STAT#/ESPI_RST#
12
LPC_SERIRQ/ESPI_CS1#
13
VCC3V3_SBY
14
LPC_DRQ0#/ESPI_ALERT0#
Connector Type
X51: 2.54 mm, 2 x 7-pin socket
SW11
1 2 3 4
O N
1
3
7
9
Key
13
11
2
4
6
8
10
12
14
X51
1
2
0N
SW10
